Add child node nand@0 and move NAND related property under it to align
modern nand-controller.yaml.
Fix below CHECK_DTBS warnings:
arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
Since 2019 year, commit
(212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
NAND related property is preferred located under nand@<n> even though only
one NAND chip supported.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
15 files changed, 82 insertions(+), 22 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi
index 547fb141ec0c9f4f2aace5f2095bfbd2d921d2dd..f452764fae00ef801ab0d69879457f9a404bef2e 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi
@@ -36,8 +36,12 @@ &clks {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c3 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi
index 9975b6ee433d1daf4ed24bf2b91f167fbaa398ff..58ecdb87c6d404ee3e06501f3bddd029eb9670af 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi
@@ -172,8 +172,12 @@ eth_phy: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
index aa9a442852f41b76782c570d28d277e7eb586636..6f3becd33a5b5f83dcc5df3286244fb601eaa537 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi
@@ -102,8 +102,12 @@ ethphy: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
index 85e278eb201610a1c851c4093025bb205e02a3b3..f2140dd8525f81c9b242cef1e4970baa6462b9b8 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi
@@ -73,8 +73,12 @@ ethphy: ethernet-phy@3 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "disabled";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c3 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi
index c93dbc595ef6eceda5fdf7b90dac57bfed59e489..131a3428ddb86796ed843b46cbae12f5d095b2f4 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi
@@ -260,10 +260,14 @@ fixed-link {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c3 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi
index 57297d6521cf09f1fd629ae375c9994ebb683375..d29adfef5fdba321606eb68614cc82393fea9052 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi
@@ -252,9 +252,13 @@ etnphy: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
fsl,no-blockmark-swap;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
index 2a6bb5ff808add0d3648480061e136e1050a1ccf..40d530c1dc29f2a679804992b8b41fd05ee7ead3 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts
@@ -133,8 +133,12 @@ ethphy1: ethernet-phy@1 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi
index e34c8cbe36aec682f46ffa128247bc47f3a6cab9..776f6f78ee4631fc154bf261299f687285137413 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi
@@ -101,8 +101,12 @@ ethphy0: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "disabled";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi
index a3ea1b20846253b8c4a5dc3a0ff0d505c24be3ff..27e4d2aec137fc35016428d8b3605ebaed65f490 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi
@@ -63,8 +63,12 @@ ethphy1: ethernet-phy@1 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "disabled";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi
index 1992dfb53b45cd308522c3e922d5758f5b8fe527..dc53f9286ffe27c718b8b8bd01169d1ff4ad13af 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi
@@ -296,9 +296,13 @@ &fec2 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
fsl,no-blockmark-swap;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&i2c2 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi
index ec3c1e7301f48f6fbf0190a8286d5110ef61c35d..eaed2cbf0c82aa55bb436a03e0eb45be7cf94c5b 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi
@@ -160,11 +160,15 @@ &gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
fsl,use-minimum-ecc;
- nand-on-flash-bbt;
- nand-ecc-mode = "hw";
- nand-ecc-strength = <8>;
- nand-ecc-step-size = <512>;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <8>;
+ nand-ecc-step-size = <512>;
+ };
};
/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi
index 43518bf0760249831781dc5220fa640eabf16d14..3dfd43b320553c45e22e4862cb1299c11eee1dfd 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi
@@ -43,11 +43,15 @@ ethphy0: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-ecc-mode = "hw";
- nand-ecc-strength = <0>;
- nand-ecc-step-size = <0>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "hw";
+ nand-ecc-strength = <0>;
+ nand-ecc-step-size = <0>;
+ nand-on-flash-bbt;
+ };
};
&iomuxc {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi
index 83b9de17cee2de37c15a461ddbdc74f0aee2e34c..fc298f57bfff349fe51983baae19c58d7e99f1aa 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi
@@ -60,8 +60,12 @@ ethphy0: ethernet-phy@0 {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "disabled";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&uart1 {
diff --git a/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts b/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts
index 2d9f495660c9a329dcfb15d04864690efbd1cb7f..8ec18eae98a46abbf3d0a81cca2c5bd24765fcb6 100644
--- a/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts
@@ -25,8 +25,12 @@ usdhc2_pwrseq: usdhc2-pwrseq {
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
- nand-on-flash-bbt;
status = "okay";
+
+ nand@0 {
+ reg = <0>;
+ nand-on-flash-bbt;
+ };
};
&snvs_poweroff {
diff --git a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
index 8666dcd7fe974699354beba7a04844fd0a2cd27f..a41dc4edfc0ddc34ff235d6ba9964120fe56fe27 100644
--- a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
@@ -375,10 +375,14 @@ &gpio7 {
/* NAND on such SKUs */
&gpmi {
fsl,use-minimum-ecc;
- nand-ecc-mode = "hw";
- nand-on-flash-bbt;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
+
+ nand@0 {
+ reg = <0>;
+ nand-ecc-mode = "hw";
+ nand-on-flash-bbt;
+ };
};
/* On-module Power I2C */
--
2.34.1Hello Frank,
On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
> Add child node nand@0 and move NAND related property under it to align
> modern nand-controller.yaml.
>
> Fix below CHECK_DTBS warnings:
> arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
> from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
>
> Since 2019 year, commit
> (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
> NAND related property is preferred located under nand@<n> even though only
> one NAND chip supported.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
> arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
> arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
> arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
> 15 files changed, 82 insertions(+), 22 deletions(-)
>
Was any of these changes tested? Is the driver able to cope with the
binding change?
Francesco
On Wed, Nov 05, 2025 at 12:55:38PM +0100, Francesco Dolcini wrote:
> Hello Frank,
>
> On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
> > Add child node nand@0 and move NAND related property under it to align
> > modern nand-controller.yaml.
> >
> > Fix below CHECK_DTBS warnings:
> > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
> > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
> >
> > Since 2019 year, commit
> > (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
> > NAND related property is preferred located under nand@<n> even though only
> > one NAND chip supported.
> >
> > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > ---
> > arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
> > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
> > arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
> > arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
> > 15 files changed, 82 insertions(+), 22 deletions(-)
> >
>
> Was any of these changes tested? Is the driver able to cope with the
> binding change?
I have not board to do direct test. This format is used at imx8 platform,
which use the same gpmi driver.
This properties are parsed at mtd common part
drivers/mtd/nand/raw/nand_base.c
If you have one of above board to test it, it will be appericated.
Frank
>
> Francesco
>
>
Hello Frank,
On Wed, Nov 05, 2025 at 10:29:05AM -0500, Frank Li wrote:
> On Wed, Nov 05, 2025 at 12:55:38PM +0100, Francesco Dolcini wrote:
> > On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
> > > Add child node nand@0 and move NAND related property under it to align
> > > modern nand-controller.yaml.
> > >
> > > Fix below CHECK_DTBS warnings:
> > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
> > > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
> > >
> > > Since 2019 year, commit
> > > (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
> > > NAND related property is preferred located under nand@<n> even though only
> > > one NAND chip supported.
> > >
> > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > ---
> > > arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
> > > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
> > > arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
> > > arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
> > > 15 files changed, 82 insertions(+), 22 deletions(-)
> > >
> >
> > Was any of these changes tested? Is the driver able to cope with the
> > binding change?
>
> I have not board to do direct test. This format is used at imx8 platform,
> which use the same gpmi driver.
>
> This properties are parsed at mtd common part
> drivers/mtd/nand/raw/nand_base.c
>
> If you have one of above board to test it, it will be appericated.
I did a minimal boot test, on colibri-imx6ull, and the board was booting
fine, with Linux 6.18.0-rc4 and this patch applied.
I am wondering if there is any impact with the bootloader, this DT is
used as it is also in U-Boot, and there the NAND driver is for sure
different. Any comment on this? I was not able to test this combination.
Francesco
On Fri, Nov 07, 2025 at 04:52:01PM +0100, Francesco Dolcini wrote:
> Hello Frank,
>
> On Wed, Nov 05, 2025 at 10:29:05AM -0500, Frank Li wrote:
> > On Wed, Nov 05, 2025 at 12:55:38PM +0100, Francesco Dolcini wrote:
> > > On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
> > > > Add child node nand@0 and move NAND related property under it to align
> > > > modern nand-controller.yaml.
> > > >
> > > > Fix below CHECK_DTBS warnings:
> > > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
> > > > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
> > > >
> > > > Since 2019 year, commit
> > > > (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
> > > > NAND related property is preferred located under nand@<n> even though only
> > > > one NAND chip supported.
> > > >
> > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > ---
> > > > arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
> > > > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
> > > > arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
> > > > arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
> > > > 15 files changed, 82 insertions(+), 22 deletions(-)
> > > >
> > >
> > > Was any of these changes tested? Is the driver able to cope with the
> > > binding change?
> >
> > I have not board to do direct test. This format is used at imx8 platform,
> > which use the same gpmi driver.
> >
> > This properties are parsed at mtd common part
> > drivers/mtd/nand/raw/nand_base.c
> >
> > If you have one of above board to test it, it will be appericated.
>
> I did a minimal boot test, on colibri-imx6ull, and the board was booting
> fine, with Linux 6.18.0-rc4 and this patch applied.
>
> I am wondering if there is any impact with the bootloader, this DT is
> used as it is also in U-Boot, and there the NAND driver is for sure
> different. Any comment on this? I was not able to test this combination.
Uboot should have theirself tree, which copy dts and not direct use it.
I worry uboot parser kernel's dtb to do some hot fix for specific boards.
But most likely not related these proptetry, maybe just add partitions.
Frank
>
> Francesco
>
>
On 10/11/2025 17:12, Frank Li wrote:
> On Fri, Nov 07, 2025 at 04:52:01PM +0100, Francesco Dolcini wrote:
>> Hello Frank,
>>
>> On Wed, Nov 05, 2025 at 10:29:05AM -0500, Frank Li wrote:
>>> On Wed, Nov 05, 2025 at 12:55:38PM +0100, Francesco Dolcini wrote:
>>>> On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
>>>>> Add child node nand@0 and move NAND related property under it to align
>>>>> modern nand-controller.yaml.
>>>>>
>>>>> Fix below CHECK_DTBS warnings:
>>>>> arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
>>>>> from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
>>>>>
>>>>> Since 2019 year, commit
>>>>> (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
>>>>> NAND related property is preferred located under nand@<n> even though only
>>>>> one NAND chip supported.
>>>>>
>>>>> Signed-off-by: Frank Li <Frank.Li@nxp.com>
>>>>> ---
>>>>> arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
>>>>> arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
>>>>> arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
>>>>> arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
>>>>> 15 files changed, 82 insertions(+), 22 deletions(-)
>>>>>
>>>>
>>>> Was any of these changes tested? Is the driver able to cope with the
>>>> binding change?
>>>
>>> I have not board to do direct test. This format is used at imx8 platform,
>>> which use the same gpmi driver.
>>>
>>> This properties are parsed at mtd common part
>>> drivers/mtd/nand/raw/nand_base.c
>>>
>>> If you have one of above board to test it, it will be appericated.
>>
>> I did a minimal boot test, on colibri-imx6ull, and the board was booting
>> fine, with Linux 6.18.0-rc4 and this patch applied.
>>
>> I am wondering if there is any impact with the bootloader, this DT is
>> used as it is also in U-Boot, and there the NAND driver is for sure
>> different. Any comment on this? I was not able to test this combination.
>
> Uboot should have theirself tree, which copy dts and not direct use it.
Sorry, but what? No they shall not.
There is only one DTS. For all upstream users following kernel style,
which includes BSD and U-boot and probably many more.
Best regards,
Krzysztof
On Mon, Nov 10, 2025 at 11:12:49AM -0500, Frank Li wrote:
> On Fri, Nov 07, 2025 at 04:52:01PM +0100, Francesco Dolcini wrote:
> > Hello Frank,
> >
> > On Wed, Nov 05, 2025 at 10:29:05AM -0500, Frank Li wrote:
> > > On Wed, Nov 05, 2025 at 12:55:38PM +0100, Francesco Dolcini wrote:
> > > > On Tue, Nov 04, 2025 at 05:27:14PM -0500, Frank Li wrote:
> > > > > Add child node nand@0 and move NAND related property under it to align
> > > > > modern nand-controller.yaml.
> > > > >
> > > > > Fix below CHECK_DTBS warnings:
> > > > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri-aster.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): Unevaluated properties are not allowed ('nand-ecc-mode', 'nand-ecc-step-size', 'nand-ecc-strength', 'nand-on-flash-bbt' were unexpected)
> > > > > from schema $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
> > > > >
> > > > > Since 2019 year, commit
> > > > > (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
> > > > > NAND related property is preferred located under nand@<n> even though only
> > > > > one NAND chip supported.
> > > > >
> > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > > ---
> > > > > arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi | 12 ++++++++----
> > > > > arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi | 12 ++++++++----
> > > > > arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts | 6 +++++-
> > > > > arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi | 8 ++++++--
> > > > > 15 files changed, 82 insertions(+), 22 deletions(-)
> > > > >
> > > >
> > > > Was any of these changes tested? Is the driver able to cope with the
> > > > binding change?
> > >
> > > I have not board to do direct test. This format is used at imx8 platform,
> > > which use the same gpmi driver.
> > >
> > > This properties are parsed at mtd common part
> > > drivers/mtd/nand/raw/nand_base.c
> > >
> > > If you have one of above board to test it, it will be appericated.
> >
> > I did a minimal boot test, on colibri-imx6ull, and the board was booting
> > fine, with Linux 6.18.0-rc4 and this patch applied.
> >
> > I am wondering if there is any impact with the bootloader, this DT is
> > used as it is also in U-Boot, and there the NAND driver is for sure
> > different. Any comment on this? I was not able to test this combination.
>
> Uboot should have theirself tree, which copy dts and not direct use it.
> I worry uboot parser kernel's dtb to do some hot fix for specific boards.
> But most likely not related these proptetry, maybe just add partitions.
U-Boot just sync the device tree from Linux, copying those, for some
boards (depending on the usage of the so called OF_UPSTREAM).
You cannot think at this change affecting only Linux.
Francesco
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