Only few warning left because original data is wrong
arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): nand@0:nand-ecc-step-size: 0 is less than the minimum of 1

driver will leave default value when these value is 0, but binding require
start from 1.

Since 2019 year, commit
        (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
        NAND related property is preferred located under nand@<n> even though only
        one NAND chip supported.

NAND related property should be located under nand@0. This format already
support quite long time, so it should be safe to switch to modern format.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
Frank Li (3):
      ARM: dts: imx6qdl: add '#address-cells' and '#size-cells' for gpmi-nand
      ARM: dts: imx6sx: update gpmi #size-cells to 0
      ARM: dts: imx: move nand related property under nand@0

 arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi           |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi              |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi      |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi           |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi                |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi                    |  2 ++
 arch/arm/boot/dts/nxp/imx/imx6sx.dtsi                     |  2 +-
 arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts                 |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi               |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi  |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi               |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi            | 12 ++++++++----
 arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi   | 12 ++++++++----
 arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi      |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts          |  6 +++++-
 arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi               |  8 ++++++--
 17 files changed, 85 insertions(+), 23 deletions(-)
---
base-commit: f8a6148698538647188a0f801f686ff90035a8ca
change-id: 20251104-gpmi_dts-67f07fb2041c

Best regards,
--
Frank Li <Frank.Li@nxp.com>

On Tue, Nov 04, 2025 at 05:27:11PM -0500, Frank Li wrote:
>Only few warning left because original data is wrong
>arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea-bmm.dtb: nand-controller@1806000 (fsl,imx6q-gpmi-nand): nand@0:nand-ecc-step-size: 0 is less than the minimum of 1
>
>driver will leave default value when these value is 0, but binding require
>start from 1.
>
>Since 2019 year, commit
>        (212e496935929 dt-bindings: mtd: Add YAML schemas for the generic NAND options)
>        NAND related property is preferred located under nand@<n> even though only
>        one NAND chip supported.
>
>NAND related property should be located under nand@0. This format already
>support quite long time, so it should be safe to switch to modern format.
>
>Signed-off-by: Frank Li <Frank.Li@nxp.com>
>---
>Frank Li (3):
>      ARM: dts: imx6qdl: add '#address-cells' and '#size-cells' for gpmi-nand
>      ARM: dts: imx6sx: update gpmi #size-cells to 0
>      ARM: dts: imx: move nand related property under nand@0
>

Reviewed-by: Peng Fan <peng.fan@nxp.com>