[v4] Enable CTCU device for QCS8300

[PATCH v4 0/2] Enable CTCU device for QCS8300

Jie Gan posted 2 patches 1 month, 1 week ago

Diff against v1 v2 v3
Download series mbox

.../bindings/arm/qcom,coresight-ctcu.yaml          |   9 +-
arch/arm64/boot/dts/qcom/monaco.dtsi               | 153 +++++++++++++++++++++
2 files changed, 160 insertions(+), 2 deletions(-)

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[PATCH v4 0/2] Enable CTCU device for QCS8300

Posted by Jie Gan 1 month, 1 week ago

Enable CTCU device for QCS8300 platform. Add a fallback mechnasim in binding to utilize
the compitable of the SA8775p platform becuase the CTCU for QCS8300 shares same
configurations as SA8775p platform.

Changes in V4:
1. dtsi file has been renamed from qcs8300.dtsi -> monaco.dtsi
Link to V3 - https://lore.kernel.org/all/20251013-enable-ctcu-for-qcs8300-v3-0-611e6e0d3085@oss.qualcomm.com/

Changes in V3:
1. rebased on tag next-20251010
Link to V2 - https://lore.kernel.org/all/20250624095905.7609-1-jie.gan@oss.qualcomm.com/

Changes in V2:
1. Add Krzysztof's R-B tag for dt-binding patch.
2. Add Konrad's Acked-by tag for dt patch.
3. Rebased on tag next-20250623.
4. Missed email addresses for coresight's maintainers in V1, loop them.
Link to V1 - https://lore.kernel.org/all/20250327024943.3502313-1-jie.gan@oss.qualcomm.com/

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
---
Jie Gan (2):
      dt-bindings: arm: add CTCU device for monaco
      arm64: dts: qcom: monaco: Add CTCU and ETR nodes

 .../bindings/arm/qcom,coresight-ctcu.yaml          |   9 +-
 arch/arm64/boot/dts/qcom/monaco.dtsi               | 153 +++++++++++++++++++++
 2 files changed, 160 insertions(+), 2 deletions(-)
---
base-commit: 9823120909776bbca58a3c55ef1f27d49283c1f3
change-id: 20251103-enable-ctcu-for-monaco-0db252ddf010

Best regards,
-- 
Jie Gan <jie.gan@oss.qualcomm.com>