.../devicetree/bindings/usb/renesas,rzg3e-xhci.yaml | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add device tree binding support for the USB3.2 Gen2 controller on Renesas
RZ/V2H(P) and RZ/V2N SoCs. The USB3.2 IP on these SoCs is identical to
that found on the RZ/G3E SoC.
Add new compatible strings "renesas,r9a09g056-xhci" for RZ/V2N and
"renesas,r9a09g057-xhci" for RZ/V2H(P). Both variants use
"renesas,r9a09g047-xhci" as a fallback compatible to indicate hardware
compatibility with the RZ/G3E implementation.
Update the title to be more generic as it now covers multiple SoC
families beyond just RZ/G3E.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
.../devicetree/bindings/usb/renesas,rzg3e-xhci.yaml | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml
index 98260f9fb442..3f4b09e48ce0 100644
--- a/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml
+++ b/Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml
@@ -4,14 +4,22 @@
$id: http://devicetree.org/schemas/usb/renesas,rzg3e-xhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Renesas RZ/G3E USB 3.2 Gen2 Host controller
+title: Renesas USB 3.2 Gen2 Host controller
maintainers:
- Biju Das <biju.das.jz@bp.renesas.com>
properties:
compatible:
- const: renesas,r9a09g047-xhci
+ oneOf:
+ - items:
+ - enum:
+ - renesas,r9a09g056-xhci # RZ/V2N
+ - renesas,r9a09g057-xhci # RZ/V2H(P)
+ - const: renesas,r9a09g047-xhci
+
+ - items:
+ - const: renesas,r9a09g047-xhci # RZ/G3E
reg:
maxItems: 1
--
2.43.0
On Sat, 1 Nov 2025 at 05:24, Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Add device tree binding support for the USB3.2 Gen2 controller on Renesas
> RZ/V2H(P) and RZ/V2N SoCs. The USB3.2 IP on these SoCs is identical to
> that found on the RZ/G3E SoC.
>
> Add new compatible strings "renesas,r9a09g056-xhci" for RZ/V2N and
> "renesas,r9a09g057-xhci" for RZ/V2H(P). Both variants use
> "renesas,r9a09g047-xhci" as a fallback compatible to indicate hardware
> compatibility with the RZ/G3E implementation.
>
> Update the title to be more generic as it now covers multiple SoC
> families beyond just RZ/G3E.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
On Sat, Nov 01, 2025 at 04:24:40AM +0000, Prabhakar wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Add device tree binding support for the USB3.2 Gen2 controller on Renesas > RZ/V2H(P) and RZ/V2N SoCs. The USB3.2 IP on these SoCs is identical to > that found on the RZ/G3E SoC. > > Add new compatible strings "renesas,r9a09g056-xhci" for RZ/V2N and > "renesas,r9a09g057-xhci" for RZ/V2H(P). Both variants use > "renesas,r9a09g047-xhci" as a fallback compatible to indicate hardware > compatibility with the RZ/G3E implementation. We can read patches. Don't explain that. Explain the hardware, which DT maintainers cannot read because we do not have datasheets. You almost never need to explain in 50% of commit msg (that's the biggest paragraph here) WHAT you are doing in the patch. What you should always focus is WHY you are doing and that's the feedback I already gave you for sure. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
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