Add support for pressure and temperature rising threshold events. For
both channels *_en and *_value (in raw units) attributes are exposed.
Since in write_event_config() the ctrl_reg1.active and ctrl_reg4
are modified, accessing the data->ctrl_reg{1,4} in set_trigger_state()
and write_event_config() needs to be now guarded by data->lock.
Otherwise, it would be possible that 2 concurrent threads executing
these functions would access the data->ctrl_reg{1,4} at the same time
and then one would overwrite the other's result.
Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
---
drivers/iio/pressure/mpl3115.c | 219 +++++++++++++++++++++++++++++++--
1 file changed, 209 insertions(+), 10 deletions(-)
diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c
index c212dfdf59ff..472e9fd65776 100644
--- a/drivers/iio/pressure/mpl3115.c
+++ b/drivers/iio/pressure/mpl3115.c
@@ -14,10 +14,13 @@
#include <linux/cleanup.h>
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/limits.h>
#include <linux/module.h>
#include <linux/property.h>
+#include <linux/units.h>
#include <linux/iio/buffer.h>
+#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/triggered_buffer.h>
@@ -30,6 +33,8 @@
#define MPL3115_WHO_AM_I 0x0c
#define MPL3115_INT_SOURCE 0x12
#define MPL3115_PT_DATA_CFG 0x13
+#define MPL3115_PRESS_TGT 0x16 /* MSB first, 16 bit */
+#define MPL3115_TEMP_TGT 0x18
#define MPL3115_CTRL_REG1 0x26
#define MPL3115_CTRL_REG2 0x27
#define MPL3115_CTRL_REG3 0x28
@@ -42,6 +47,8 @@
#define MPL3115_STATUS_TEMP_RDY BIT(1)
#define MPL3115_INT_SRC_DRDY BIT(7)
+#define MPL3115_INT_SRC_PTH BIT(3)
+#define MPL3115_INT_SRC_TTH BIT(2)
#define MPL3115_PT_DATA_EVENT_ALL GENMASK(2, 0)
@@ -56,6 +63,8 @@
#define MPL3115_CTRL3_IPOL2 BIT(1)
#define MPL3115_CTRL4_INT_EN_DRDY BIT(7)
+#define MPL3115_CTRL4_INT_EN_PTH BIT(3)
+#define MPL3115_CTRL4_INT_EN_TTH BIT(2)
#define MPL3115_CTRL5_INT_CFG_DRDY BIT(7)
@@ -83,6 +92,7 @@ struct mpl3115_data {
struct iio_trigger *drdy_trig;
struct mutex lock;
u8 ctrl_reg1;
+ u8 ctrl_reg4;
};
enum mpl3115_irq_pin {
@@ -306,6 +316,15 @@ static irqreturn_t mpl3115_trigger_handler(int irq, void *p)
return IRQ_HANDLED;
}
+static const struct iio_event_spec mpl3115_temp_press_event[] = {
+ {
+ .type = IIO_EV_TYPE_THRESH,
+ .dir = IIO_EV_DIR_RISING,
+ .mask_separate = BIT(IIO_EV_INFO_ENABLE) |
+ BIT(IIO_EV_INFO_VALUE),
+ },
+};
+
static const struct iio_chan_spec mpl3115_channels[] = {
{
.type = IIO_PRESSURE,
@@ -321,7 +340,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
.storagebits = 32,
.shift = 12,
.endianness = IIO_BE,
- }
+ },
+ .event_spec = mpl3115_temp_press_event,
+ .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
},
{
.type = IIO_TEMP,
@@ -337,7 +358,9 @@ static const struct iio_chan_spec mpl3115_channels[] = {
.storagebits = 16,
.shift = 4,
.endianness = IIO_BE,
- }
+ },
+ .event_spec = mpl3115_temp_press_event,
+ .num_event_specs = ARRAY_SIZE(mpl3115_temp_press_event),
},
IIO_CHAN_SOFT_TIMESTAMP(2),
};
@@ -347,15 +370,45 @@ static irqreturn_t mpl3115_interrupt_handler(int irq, void *private)
struct iio_dev *indio_dev = private;
struct mpl3115_data *data = iio_priv(indio_dev);
int ret;
+ __be32 val_press;
+ __be16 val_temp;
ret = i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE);
if (ret < 0)
return IRQ_HANDLED;
- if (!(ret & MPL3115_INT_SRC_DRDY))
+ if (!(ret & (MPL3115_INT_SRC_TTH | MPL3115_INT_SRC_PTH |
+ MPL3115_INT_SRC_DRDY)))
return IRQ_NONE;
- iio_trigger_poll_nested(data->drdy_trig);
+ if (ret & MPL3115_INT_SRC_DRDY)
+ iio_trigger_poll_nested(data->drdy_trig);
+
+ if (ret & MPL3115_INT_SRC_PTH) {
+ iio_push_event(indio_dev,
+ IIO_UNMOD_EVENT_CODE(IIO_PRESSURE, 0,
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_DIR_RISING),
+ iio_get_time_ns(indio_dev));
+
+ /* Reset the SRC_PTH bit in INT_SOURCE */
+ i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_OUT_PRESS,
+ 3, (u8 *)&val_press);
+ }
+
+ if (ret & MPL3115_INT_SRC_TTH) {
+ iio_push_event(indio_dev,
+ IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
+ IIO_EV_TYPE_THRESH,
+ IIO_EV_DIR_RISING),
+ iio_get_time_ns(indio_dev));
+
+ /* Reset the SRC_TTH bit in INT_SOURCE */
+ i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_OUT_TEMP,
+ 2, (u8 *)&val_temp);
+ }
return IRQ_HANDLED;
}
@@ -376,6 +429,7 @@ static int mpl3115_config_interrupt(struct mpl3115_data *data,
goto reg1_cleanup;
data->ctrl_reg1 = ctrl_reg1;
+ data->ctrl_reg4 = ctrl_reg4;
return 0;
@@ -389,15 +443,22 @@ static int mpl3115_set_trigger_state(struct iio_trigger *trig, bool state)
{
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
struct mpl3115_data *data = iio_priv(indio_dev);
- u8 ctrl_reg1 = data->ctrl_reg1;
- u8 ctrl_reg4 = state ? MPL3115_CTRL4_INT_EN_DRDY : 0;
+ u8 ctrl_reg1, ctrl_reg4;
- if (state)
+ guard(mutex)(&data->lock);
+
+ ctrl_reg1 = data->ctrl_reg1;
+ ctrl_reg4 = data->ctrl_reg4;
+
+ if (state) {
ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
- else
- ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+ ctrl_reg4 |= MPL3115_CTRL4_INT_EN_DRDY;
+ } else {
+ ctrl_reg4 &= ~MPL3115_CTRL4_INT_EN_DRDY;
- guard(mutex)(&data->lock);
+ if (!ctrl_reg4)
+ ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+ }
return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
}
@@ -406,10 +467,148 @@ static const struct iio_trigger_ops mpl3115_trigger_ops = {
.set_trigger_state = mpl3115_set_trigger_state,
};
+static int mpl3115_read_event_config(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+
+ if (chan->type == IIO_PRESSURE)
+ return !!(data->ctrl_reg4 & MPL3115_CTRL4_INT_EN_PTH);
+
+ if (chan->type == IIO_TEMP)
+ return !!(data->ctrl_reg4 & MPL3115_CTRL4_INT_EN_TTH);
+
+ return -EINVAL;
+}
+
+static int mpl3115_write_event_config(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ bool state)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ u8 int_en_mask;
+ u8 ctrl_reg1, ctrl_reg4;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ int_en_mask = MPL3115_CTRL4_INT_EN_PTH;
+ break;
+ case IIO_TEMP:
+ int_en_mask = MPL3115_CTRL4_INT_EN_TTH;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ guard(mutex)(&data->lock);
+
+ ctrl_reg1 = data->ctrl_reg1;
+ ctrl_reg4 = data->ctrl_reg4;
+
+ if (state) {
+ ctrl_reg1 |= MPL3115_CTRL1_ACTIVE;
+ ctrl_reg4 |= int_en_mask;
+ } else {
+ ctrl_reg4 &= ~int_en_mask;
+
+ if (!ctrl_reg4)
+ ctrl_reg1 &= ~MPL3115_CTRL1_ACTIVE;
+ }
+
+ return mpl3115_config_interrupt(data, ctrl_reg1, ctrl_reg4);
+}
+
+static int mpl3115_read_thresh(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ enum iio_event_info info,
+ int *val, int *val2)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ int ret;
+ __be16 tmp;
+
+ if (info != IIO_EV_INFO_VALUE)
+ return -EINVAL;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ ret = i2c_smbus_read_i2c_block_data(data->client,
+ MPL3115_PRESS_TGT,
+ sizeof(tmp), (u8 *)&tmp);
+ if (ret < 0)
+ return ret;
+
+ /*
+ * Target value for the pressure is
+ * 16-bit unsigned value in 2 Pa units
+ */
+ *val = be16_to_cpu(tmp) << 1;
+
+ return IIO_VAL_INT;
+ case IIO_TEMP:
+ ret = i2c_smbus_read_byte_data(data->client, MPL3115_TEMP_TGT);
+ if (ret < 0)
+ return ret;
+
+ /* Target value for the temperature is 8-bit 2's complement */
+ *val = sign_extend32(ret, 7);
+
+ return IIO_VAL_INT;
+ default:
+ return -EINVAL;
+ }
+}
+
+static int mpl3115_write_thresh(struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan,
+ enum iio_event_type type,
+ enum iio_event_direction dir,
+ enum iio_event_info info,
+ int val, int val2)
+{
+ struct mpl3115_data *data = iio_priv(indio_dev);
+ __be16 tmp;
+
+ if (info != IIO_EV_INFO_VALUE)
+ return -EINVAL;
+
+ switch (chan->type) {
+ case IIO_PRESSURE:
+ val >>= 1;
+
+ if (val < 0 || val > U16_MAX)
+ return -EINVAL;
+
+ tmp = cpu_to_be16(val);
+
+ return i2c_smbus_write_i2c_block_data(data->client,
+ MPL3115_PRESS_TGT,
+ sizeof(tmp), (u8 *)&tmp);
+ case IIO_TEMP:
+ if (val < S8_MIN || val > S8_MAX)
+ return -EINVAL;
+
+ return i2c_smbus_write_byte_data(data->client,
+ MPL3115_TEMP_TGT, val);
+ default:
+ return -EINVAL;
+ }
+}
+
static const struct iio_info mpl3115_info = {
.read_raw = &mpl3115_read_raw,
.read_avail = &mpl3115_read_avail,
.write_raw = &mpl3115_write_raw,
+ .read_event_config = mpl3115_read_event_config,
+ .write_event_config = mpl3115_write_event_config,
+ .read_event_value = mpl3115_read_thresh,
+ .write_event_value = mpl3115_write_thresh,
};
static int mpl3115_trigger_probe(struct mpl3115_data *data,
--
2.25.1On Fri, 31 Oct 2025 21:18:22 +0100
Antoni Pokusinski <apokusinski01@gmail.com> wrote:
> Add support for pressure and temperature rising threshold events. For
> both channels *_en and *_value (in raw units) attributes are exposed.
>
> Since in write_event_config() the ctrl_reg1.active and ctrl_reg4
> are modified, accessing the data->ctrl_reg{1,4} in set_trigger_state()
> and write_event_config() needs to be now guarded by data->lock.
> Otherwise, it would be possible that 2 concurrent threads executing
> these functions would access the data->ctrl_reg{1,4} at the same time
> and then one would overwrite the other's result.
>
> Signed-off-by: Antoni Pokusinski <apokusinski01@gmail.com>
Generally looks good to me, but some comments on the 24 bit value reading.
You got a lot of review quickly for this patch so I want to give some time
for follow up on v2 anyway.
Thanks,
Jonathan
> ---
> drivers/iio/pressure/mpl3115.c | 219 +++++++++++++++++++++++++++++++--
> 1 file changed, 209 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/iio/pressure/mpl3115.c b/drivers/iio/pressure/mpl3115.c
> index c212dfdf59ff..472e9fd65776 100644
...
> @@ -347,15 +370,45 @@ static irqreturn_t mpl3115_interrupt_handler(int irq, void *private)
> struct iio_dev *indio_dev = private;
> struct mpl3115_data *data = iio_priv(indio_dev);
> int ret;
> + __be32 val_press;
> + __be16 val_temp;
>
> ret = i2c_smbus_read_byte_data(data->client, MPL3115_INT_SOURCE);
> if (ret < 0)
> return IRQ_HANDLED;
>
> - if (!(ret & MPL3115_INT_SRC_DRDY))
> + if (!(ret & (MPL3115_INT_SRC_TTH | MPL3115_INT_SRC_PTH |
> + MPL3115_INT_SRC_DRDY)))
> return IRQ_NONE;
>
> - iio_trigger_poll_nested(data->drdy_trig);
> + if (ret & MPL3115_INT_SRC_DRDY)
> + iio_trigger_poll_nested(data->drdy_trig);
> +
> + if (ret & MPL3115_INT_SRC_PTH) {
> + iio_push_event(indio_dev,
> + IIO_UNMOD_EVENT_CODE(IIO_PRESSURE, 0,
> + IIO_EV_TYPE_THRESH,
> + IIO_EV_DIR_RISING),
> + iio_get_time_ns(indio_dev));
> +
> + /* Reset the SRC_PTH bit in INT_SOURCE */
> + i2c_smbus_read_i2c_block_data(data->client,
> + MPL3115_OUT_PRESS,
> + 3, (u8 *)&val_press);
This is an oddity. Why read into a __be32 when it's a 24bit number?
I guess it doesn't really matter as you just need a big enough space
and throw the value away. However, I'd read it into a u8 [3]; then size off that
as well.
There are two existing cases of this in the driver. One of them should use
get_unaligned_be24 on a u8[3] buffer. The other one is more complex as it's
reading directly into the scan buffer that gets pushed to the kfifo and is
reading into a u8 buffer ultimately anyway so at least there is no
real suggestion of it being 32 bits (just a +4 shift to deal with natural
alignment as the storage has to be power of 2 in that case.).
hmm. I think either we should tidy up the easy case (_read_info_raw) +
use a u8[3] here or just stick to this being odd.
My preference would be to have another patch tidying up the other case
+ use a u8[3] here.
> + }
> +
> + if (ret & MPL3115_INT_SRC_TTH) {
> + iio_push_event(indio_dev,
> + IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0,
> + IIO_EV_TYPE_THRESH,
> + IIO_EV_DIR_RISING),
> + iio_get_time_ns(indio_dev));
> +
> + /* Reset the SRC_TTH bit in INT_SOURCE */
> + i2c_smbus_read_i2c_block_data(data->client,
> + MPL3115_OUT_TEMP,
> + 2, (u8 *)&val_temp);
> + }
>
> return IRQ_HANDLED;
> }
> +
> +static int mpl3115_read_thresh(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + enum iio_event_type type,
> + enum iio_event_direction dir,
> + enum iio_event_info info,
> + int *val, int *val2)
> +{
> + struct mpl3115_data *data = iio_priv(indio_dev);
> + int ret;
> + __be16 tmp;
> +
> + if (info != IIO_EV_INFO_VALUE)
> + return -EINVAL;
> +
> + switch (chan->type) {
> + case IIO_PRESSURE:
> + ret = i2c_smbus_read_i2c_block_data(data->client,
> + MPL3115_PRESS_TGT,
> + sizeof(tmp), (u8 *)&tmp);
> + if (ret < 0)
> + return ret;
> +
> + /*
> + * Target value for the pressure is
> + * 16-bit unsigned value in 2 Pa units
Trivial but wrap comments to 80 char limit. Obviously doesn't really matter;
just a question of consistency.
> + */
> + *val = be16_to_cpu(tmp) << 1;
> +
> + return IIO_VAL_INT;
> + case IIO_TEMP:
> + ret = i2c_smbus_read_byte_data(data->client, MPL3115_TEMP_TGT);
> + if (ret < 0)
> + return ret;
> +
> + /* Target value for the temperature is 8-bit 2's complement */
> + *val = sign_extend32(ret, 7);
> +
> + return IIO_VAL_INT;
> + default:
> + return -EINVAL;
> + }
> +}
> +
> +static int mpl3115_write_thresh(struct iio_dev *indio_dev,
> + const struct iio_chan_spec *chan,
> + enum iio_event_type type,
> + enum iio_event_direction dir,
> + enum iio_event_info info,
> + int val, int val2)
> +{
> + struct mpl3115_data *data = iio_priv(indio_dev);
> + __be16 tmp;
> +
> + if (info != IIO_EV_INFO_VALUE)
> + return -EINVAL;
> +
> + switch (chan->type) {
> + case IIO_PRESSURE:
> + val >>= 1;
> +
> + if (val < 0 || val > U16_MAX)
> + return -EINVAL;
> +
> + tmp = cpu_to_be16(val);
> +
> + return i2c_smbus_write_i2c_block_data(data->client,
> + MPL3115_PRESS_TGT,
> + sizeof(tmp), (u8 *)&tmp);
> + case IIO_TEMP:
> + if (val < S8_MIN || val > S8_MAX)
> + return -EINVAL;
> +
> + return i2c_smbus_write_byte_data(data->client,
> + MPL3115_TEMP_TGT, val);
> + default:
> + return -EINVAL;
> + }
> +}
On Sun, Nov 02, 2025 at 10:38:08AM +0000, Jonathan Cameron wrote: > On Fri, 31 Oct 2025 21:18:22 +0100 > Antoni Pokusinski <apokusinski01@gmail.com> wrote: ... > Generally looks good to me, but some comments on the 24 bit value reading. > > + i2c_smbus_read_i2c_block_data(data->client, > > + MPL3115_OUT_PRESS, > > + 3, (u8 *)&val_press); > > This is an oddity. Why read into a __be32 when it's a 24bit number? > I guess it doesn't really matter as you just need a big enough space > and throw the value away. However, I'd read it into a u8 [3]; then size off that > as well. > > There are two existing cases of this in the driver. One of them should use > get_unaligned_be24 on a u8[3] buffer. The other one is more complex as it's > reading directly into the scan buffer that gets pushed to the kfifo and is > reading into a u8 buffer ultimately anyway so at least there is no > real suggestion of it being 32 bits (just a +4 shift to deal with natural > alignment as the storage has to be power of 2 in that case.). > > hmm. I think either we should tidy up the easy case (_read_info_raw) + > use a u8[3] here or just stick to this being odd. > My preference would be to have another patch tidying up the other case > + use a u8[3] here. Just a side question... Wondering, if we actually can defined __be24 and __le24 types (or at least u24) for really explicit cases. -- With Best Regards, Andy Shevchenko
On Mon, 3 Nov 2025 10:22:12 +0200 Andy Shevchenko <andriy.shevchenko@intel.com> wrote: > On Sun, Nov 02, 2025 at 10:38:08AM +0000, Jonathan Cameron wrote: > > On Fri, 31 Oct 2025 21:18:22 +0100 > > Antoni Pokusinski <apokusinski01@gmail.com> wrote: > > ... > > > > Generally looks good to me, but some comments on the 24 bit value reading. > > > > + i2c_smbus_read_i2c_block_data(data->client, > > > + MPL3115_OUT_PRESS, > > > + 3, (u8 *)&val_press); > > > > This is an oddity. Why read into a __be32 when it's a 24bit number? > > I guess it doesn't really matter as you just need a big enough space > > and throw the value away. However, I'd read it into a u8 [3]; then size off that > > as well. > > > > There are two existing cases of this in the driver. One of them should use > > get_unaligned_be24 on a u8[3] buffer. The other one is more complex as it's > > reading directly into the scan buffer that gets pushed to the kfifo and is > > reading into a u8 buffer ultimately anyway so at least there is no > > real suggestion of it being 32 bits (just a +4 shift to deal with natural > > alignment as the storage has to be power of 2 in that case.). > > > > hmm. I think either we should tidy up the easy case (_read_info_raw) + > > use a u8[3] here or just stick to this being odd. > > My preference would be to have another patch tidying up the other case > > + use a u8[3] here. > > Just a side question... Wondering, if we actually can defined __be24 and __le24 > types (or at least u24) for really explicit cases. Would be useful for readability. Particularly if we could make it work with the type checking stuff similar to the endian markings, but restricted to only be accessed with the unaligned accessors. Possibly worth doing even without that. Jonathan >
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