On Fri, Oct 31, 2025 at 11:19:06AM +0800, Richard Zhu wrote:
> i.MX95 PCIes have two reference clock inputs: one from internal PLL, the
> other from off chip crystal oscillator. The "extref" clock refers to a
> reference clock from an external crystal oscillator.
>
> Add external reference clock input for i.MX95 PCIes.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index ca5f2970f217c..703c776d28e6f 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -44,7 +44,7 @@ properties:
>
> clock-names:
> minItems: 3
> - maxItems: 5
> + maxItems: 6
>
> interrupts:
> minItems: 1
> @@ -212,14 +212,17 @@ allOf:
> then:
> properties:
> clocks:
> - maxItems: 5
> + minItems: 4
> + maxItems: 6
> clock-names:
> + minItems: 4
> items:
> - const: pcie
> - const: pcie_bus
> - const: pcie_phy
> - const: pcie_aux
> - const: ref
This was required last time. Nothing in commit msg explained changing
that.
> + - const: extref # Optional
Drop the comment, do not repeat the schema. And why only this is marked
as optional if 'ref' is optional as well now.
It is v9, can you please really think thoroughly what you are sending,
so obvious issues won't be there?
Best regards,
Krzysztof