Add a device tree binding for the Toshiba TC9563 PCIe switch, which
provides an Ethernet MAC integrated to the 3rd downstream port and
two downstream PCIe ports.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
.../devicetree/bindings/pci/toshiba,tc9563.yaml | 178 +++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..a957a4bc38d6c91a13797f848b0e2faa64eb02f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
@@ -0,0 +1,178 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba TC9563 PCIe switch
+
+maintainers:
+ - rishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
+
+description: |
+ Toshiba TC9563 PCIe switch has one upstream and three downstream ports.
+ The 3rd downstream port has integrated endpoint device of Ethernet MAC.
+ Other two downstream ports are supposed to connect to external device.
+
+ The TC9563 PCIe switch can be configured through I2C interface before
+ PCIe link is established to change FTS, ASPM related entry delays,
+ tx amplitude etc for better power efficiency and functionality.
+
+properties:
+ compatible:
+ enum:
+ - pci1179,0623
+
+ reg:
+ maxItems: 1
+
+ resx-gpios:
+ maxItems: 1
+ description:
+ GPIO controlling the RESX# pin.
+
+ vdd18-supply: true
+
+ vdd09-supply: true
+
+ vddc-supply: true
+
+ vddio1-supply: true
+
+ vddio2-supply: true
+
+ vddio18-supply: true
+
+ i2c-parent:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ A phandle to the parent I2C node and the slave address of the device
+ used to do configure tc9563 to change FTS, tx amplitude etc.
+ items:
+ - description: Phandle to the I2C controller node
+ - description: I2C slave address
+
+patternProperties:
+ "^pcie@[1-3],0$":
+ description:
+ child nodes describing the internal downstream ports
+ the tc9563 switch.
+ type: object
+ allOf:
+ - $ref: "#/$defs/tc9563-node"
+ - $ref: /schemas/pci/pci-pci-bridge.yaml#
+ unevaluatedProperties: false
+
+$defs:
+ tc9563-node:
+ type: object
+
+ properties:
+ toshiba,tx-amplitude-microvolt:
+ description:
+ Change Tx Margin setting for low power consumption.
+
+ toshiba,no-dfe-support:
+ type: boolean
+ description:
+ Disable DFE (Decision Feedback Equalizer), which mitigates
+ intersymbol interference and some reflections caused by impedance mismatches.
+
+required:
+ - resx-gpios
+ - vdd18-supply
+ - vdd09-supply
+ - vddc-supply
+ - vddio1-supply
+ - vddio2-supply
+ - vddio18-supply
+ - i2c-parent
+
+allOf:
+ - $ref: "#/$defs/tc9563-node"
+ - $ref: /schemas/pci/pci-bus-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ bus-range = <0x01 0xff>;
+
+ pcie@0,0 {
+ compatible = "pci1179,0623";
+
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ bus-range = <0x02 0xff>;
+
+ i2c-parent = <&qup_i2c 0x77>;
+
+ vdd18-supply = <&vdd>;
+ vdd09-supply = <&vdd>;
+ vddc-supply = <&vdd>;
+ vddio1-supply = <&vdd>;
+ vddio2-supply = <&vdd>;
+ vddio18-supply = <&vdd>;
+
+ resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+
+ pcie@1,0 {
+ compatible = "pciclass,0604";
+ reg = <0x20800 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x03 0xff>;
+
+ toshiba,no-dfe-support;
+ };
+
+ pcie@2,0 {
+ compatible = "pciclass,0604";
+ reg = <0x21000 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x04 0xff>;
+ };
+
+ pcie@3,0 {
+ compatible = "pciclass,0604";
+ reg = <0x21800 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x05 0xff>;
+
+ toshiba,tx-amplitude-microvolt = <10>;
+
+ ethernet@0,0 {
+ reg = <0x50000 0x0 0x0 0x0 0x0>;
+ };
+
+ ethernet@0,1 {
+ reg = <0x50100 0x0 0x0 0x0 0x0>;
+ };
+ };
+ };
+ };
+ };
--
2.34.1On Fri, Oct 31, 2025 at 04:41:58PM +0530, Krishna Chaitanya Chundru wrote:
> Add a device tree binding for the Toshiba TC9563 PCIe switch, which
> provides an Ethernet MAC integrated to the 3rd downstream port and
> two downstream PCIe ports.
> +++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
> @@ -0,0 +1,178 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Toshiba TC9563 PCIe switch
> +
> +maintainers:
> + - rishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
s/rishna/Krishna/ ?
> + i2c-parent:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + A phandle to the parent I2C node and the slave address of the device
> + used to do configure tc9563 to change FTS, tx amplitude etc.
s/used to do/used to/
> +patternProperties:
> + "^pcie@[1-3],0$":
> + description:
> + child nodes describing the internal downstream ports
> + the tc9563 switch.
s/ports/ports of/ ?
> + toshiba,no-dfe-support:
> + type: boolean
> + description:
> + Disable DFE (Decision Feedback Equalizer), which mitigates
> + intersymbol interference and some reflections caused by impedance mismatches.
Wrap to fit in 78 columns
> + pcie {
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + pcie@0 {
> + device_type = "pci";
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + bus-range = <0x01 0xff>;
> +
> + pcie@0,0 {
> + compatible = "pci1179,0623";
> +
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> + device_type = "pci";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + bus-range = <0x02 0xff>;
> ...
> + pcie@1,0 {
> + compatible = "pciclass,0604";
> + reg = <0x20800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x03 0xff>;
> +
> + toshiba,no-dfe-support;
IIUC, there are two downstream ports available for external devices,
and pcie@1,0 is one of them.
1) Putting "toshiba,no-dfe-support" in the pcie@1,0 stanza suggests
that it only applies to that port.
But from tc9563_pwrctrl_disable_dfe() in "[PATCH v8 6/7] PCI:
pwrctrl: Add power control driver for tc9563", it looks like it's
applied to the upstream port and both downstream ports. So I guess
my question is putting "toshiba,no-dfe-support" in just one
downstream port is the right place for it.
2) I see a lookup of "qcom,no-dfe-support" in [PATCH v8 6/7] PCI:
pwrctrl: Add power control driver for tc9563; is that supposed to
match this "toshiba,no-dfe-support"?
> + };
> +
> + pcie@2,0 {
> + compatible = "pciclass,0604";
> + reg = <0x21000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x04 0xff>;
> + };
> +
> + pcie@3,0 {
> + compatible = "pciclass,0604";
> + reg = <0x21800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x05 0xff>;
> +
> + toshiba,tx-amplitude-microvolt = <10>;
> +
> + ethernet@0,0 {
> + reg = <0x50000 0x0 0x0 0x0 0x0>;
> + };
> +
> + ethernet@0,1 {
> + reg = <0x50100 0x0 0x0 0x0 0x0>;
> + };
> + };
> + };
> + };
> + };
>
> --
> 2.34.1
>
On Fri, Oct 31, 2025 at 05:00:13PM -0500, Bjorn Helgaas wrote:
> On Fri, Oct 31, 2025 at 04:41:58PM +0530, Krishna Chaitanya Chundru wrote:
> > Add a device tree binding for the Toshiba TC9563 PCIe switch, which
> > provides an Ethernet MAC integrated to the 3rd downstream port and
> > two downstream PCIe ports.
> > + pcie@1,0 {
> > + compatible = "pciclass,0604";
> > + reg = <0x20800 0x0 0x0 0x0 0x0>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + device_type = "pci";
> > + ranges;
> > + bus-range = <0x03 0xff>;
> > +
> > + toshiba,no-dfe-support;
>
> IIUC, there are two downstream ports available for external devices,
> and pcie@1,0 is one of them.
>
> 1) Putting "toshiba,no-dfe-support" in the pcie@1,0 stanza suggests
> that it only applies to that port.
>
> But from tc9563_pwrctrl_disable_dfe() in "[PATCH v8 6/7] PCI:
> pwrctrl: Add power control driver for tc9563", it looks like it's
> applied to the upstream port and both downstream ports. So I guess
> my question is putting "toshiba,no-dfe-support" in just one
> downstream port is the right place for it.
Oh, I see, never mind. You keep track of ->disable_dfe on a per-port
basis, so each port has the *possibility* of using it, and you skip
programming it if the port doesn't have it.
I would assume the two downstream ports for external devices would be
identical, so I do still wonder why you would specify this for only
one of them.
> 2) I see a lookup of "qcom,no-dfe-support" in [PATCH v8 6/7] PCI:
> pwrctrl: Add power control driver for tc9563; is that supposed to
> match this "toshiba,no-dfe-support"?
>
> > + };
> > +
> > + pcie@2,0 {
> > + compatible = "pciclass,0604";
> > + reg = <0x21000 0x0 0x0 0x0 0x0>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + device_type = "pci";
> > + ranges;
> > + bus-range = <0x04 0xff>;
> > + };
> > +
> > + pcie@3,0 {
> > + compatible = "pciclass,0604";
> > + reg = <0x21800 0x0 0x0 0x0 0x0>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + device_type = "pci";
> > + ranges;
> > + bus-range = <0x05 0xff>;
> > +
> > + toshiba,tx-amplitude-microvolt = <10>;
Same question here about whether "toshiba,tx-amplitude-microvolt" is
supposed to match the "qcom,tx-amplitude-microvolt" in the driver.
> > + ethernet@0,0 {
> > + reg = <0x50000 0x0 0x0 0x0 0x0>;
> > + };
> > +
> > + ethernet@0,1 {
> > + reg = <0x50100 0x0 0x0 0x0 0x0>;
> > + };
> > + };
> > + };
> > + };
> > + };
> >
> > --
> > 2.34.1
> >
On 11/1/2025 3:42 AM, Bjorn Helgaas wrote:
> On Fri, Oct 31, 2025 at 05:00:13PM -0500, Bjorn Helgaas wrote:
>> On Fri, Oct 31, 2025 at 04:41:58PM +0530, Krishna Chaitanya Chundru wrote:
>>> Add a device tree binding for the Toshiba TC9563 PCIe switch, which
>>> provides an Ethernet MAC integrated to the 3rd downstream port and
>>> two downstream PCIe ports.
>>> + pcie@1,0 {
>>> + compatible = "pciclass,0604";
>>> + reg = <0x20800 0x0 0x0 0x0 0x0>;
>>> + #address-cells = <3>;
>>> + #size-cells = <2>;
>>> + device_type = "pci";
>>> + ranges;
>>> + bus-range = <0x03 0xff>;
>>> +
>>> + toshiba,no-dfe-support;
>> IIUC, there are two downstream ports available for external devices,
>> and pcie@1,0 is one of them.
>>
>> 1) Putting "toshiba,no-dfe-support" in the pcie@1,0 stanza suggests
>> that it only applies to that port.
>>
>> But from tc9563_pwrctrl_disable_dfe() in "[PATCH v8 6/7] PCI:
>> pwrctrl: Add power control driver for tc9563", it looks like it's
>> applied to the upstream port and both downstream ports. So I guess
>> my question is putting "toshiba,no-dfe-support" in just one
>> downstream port is the right place for it.
> Oh, I see, never mind. You keep track of ->disable_dfe on a per-port
> basis, so each port has the *possibility* of using it, and you skip
> programming it if the port doesn't have it.
>
> I would assume the two downstream ports for external devices would be
> identical, so I do still wonder why you would specify this for only
> one of them.
Hi Bjorn,
As this is just an example, we just added here. In actually use case we
are free
to add it for any port.
For remaining comments, you are right I didn't notice I am still using
older one's
I will fix in next series.
- Krishna Chaitanya.
>> 2) I see a lookup of "qcom,no-dfe-support" in [PATCH v8 6/7] PCI:
>> pwrctrl: Add power control driver for tc9563; is that supposed to
>> match this "toshiba,no-dfe-support"?
>>
>>> + };
>>> +
>>> + pcie@2,0 {
>>> + compatible = "pciclass,0604";
>>> + reg = <0x21000 0x0 0x0 0x0 0x0>;
>>> + #address-cells = <3>;
>>> + #size-cells = <2>;
>>> + device_type = "pci";
>>> + ranges;
>>> + bus-range = <0x04 0xff>;
>>> + };
>>> +
>>> + pcie@3,0 {
>>> + compatible = "pciclass,0604";
>>> + reg = <0x21800 0x0 0x0 0x0 0x0>;
>>> + #address-cells = <3>;
>>> + #size-cells = <2>;
>>> + device_type = "pci";
>>> + ranges;
>>> + bus-range = <0x05 0xff>;
>>> +
>>> + toshiba,tx-amplitude-microvolt = <10>;
> Same question here about whether "toshiba,tx-amplitude-microvolt" is
> supposed to match the "qcom,tx-amplitude-microvolt" in the driver.
>
>>> + ethernet@0,0 {
>>> + reg = <0x50000 0x0 0x0 0x0 0x0>;
>>> + };
>>> +
>>> + ethernet@0,1 {
>>> + reg = <0x50100 0x0 0x0 0x0 0x0>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>>
>>> --
>>> 2.34.1
>>>
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