On Thu, Oct 30, 2025 at 05:55:05PM +0000, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Add documentation for the serial communication interface (RSCI) found on
> the Renesas RZ/G3E (R9A09G047) SoC. The RSCI IP on this SoC is identical
> to that on the RZ/T2H (R9A09G077) SoC, but it has a 32-stage FIFO compared
> to 16 on RZ/T2H. It supports both FIFO and non-FIFO mode operation. RZ/G3E
> has 6 clocks(5 module clocks + 1 external clock) compared to 3 clocks
> (2 module clocks + 1 external clock) on RZ/T2H, and it has multiple resets.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v1->v2:
> * Updated commit message
> * Added resets:false for non RZ/G3E SoCs.
> ---
> .../bindings/serial/renesas,rsci.yaml | 85 ++++++++++++++++---
> 1 file changed, 74 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> index 6b1f827a335b..1c2ed4cd58fd 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> @@ -10,17 +10,16 @@ maintainers:
> - Geert Uytterhoeven <geert+renesas@glider.be>
> - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> -allOf:
> - - $ref: serial.yaml#
> -
> properties:
> compatible:
> oneOf:
> - - items:
> - - const: renesas,r9a09g087-rsci # RZ/N2H
> - - const: renesas,r9a09g077-rsci # RZ/T2H
> + - enum:
> + - renesas,r9a09g047-rsci # RZ/G3E non FIFO mode
> + - renesas,r9a09g047-rscif # RZ/G3E FIFO mode
> + - renesas,r9a09g077-rsci # RZ/T2H
>
> - items:
> + - const: renesas,r9a09g087-rsci # RZ/N2H
> - const: renesas,r9a09g077-rsci # RZ/T2H
>
> reg:
> @@ -42,14 +41,40 @@ properties:
>
> clocks:
> minItems: 2
> - maxItems: 3
> + maxItems: 6
>
> clock-names:
> - minItems: 2
> + oneOf:
> + - items:
> + - const: operation
> + - const: bus
> + - items:
> + - const: operation
> + - const: bus
> + - const: sck # optional external clock input
minItems: 2
And drop the 1st items list.
> + - items:
> + - const: bus
> + - const: tclk
> + - const: tclk_div64
> + - const: tclk_div16
> + - const: tclk_div4
> + - items:
> + - const: bus
> + - const: tclk
> + - const: tclk_div64
> + - const: tclk_div16
> + - const: tclk_div4
> + - const: sck # optional external clock input
minItems: 5
and drop the 3rd items list.
> +
> + resets:
> + items:
> + - description: Input for resetting the APB clock
> + - description: Input for resetting TCLK
> +
> + reset-names:
> items:
> - - const: operation
> - - const: bus
> - - const: sck # optional external clock input
> + - const: presetn
> + - const: tresetn
>
> power-domains:
> maxItems: 1
> @@ -62,6 +87,44 @@ required:
> - clock-names
> - power-domains
>
> +allOf:
> + - $ref: serial.yaml#
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a09g077-rsci
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> +
> + clock-names:
> + maxItems: 3
You need minItems and maxItems here as the range is 2-6 clocks.
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g047-rsci
> + - renesas,r9a09g047-rscif
> + then:
> + properties:
> + clocks:
> + minItems: 5
> +
> + clock-names:
> + minItems: 5
And maxItems here in addition.
> +
> + required:
> + - resets
> + - reset-names
> + else:
> + properties:
> + resets: false
> +
> unevaluatedProperties: false
>
> examples:
> --
> 2.43.0
>