The internal MSI controller in DWC IPs supports multiple MSI ctrls, each
capable of receiving 32 MSI vectors per ctrl. And each MSI ctrl requires a
dedicated MSI platform IRQ in devicetree to function. Otherwise, MSIs won't
be received from the endpoints.

Currently, dw_pcie_msi_host_init() only registers the IRQ handler if the
MSI ctrl has the associated MSI platform IRQ in DT. But it doesn't warn if
the IRQ is not available. This may cause developers/users to believe that
the platform supports MSI vectors from all MSI ctrls, but it doesn't.

This discrepancy can happen due to two reasons:

1. Controller driver incorrectly set the dw_pcie_rp::num_vectors field.
2. DT missed specifying the MSI IRQs

To catch these, add a warning so that the above mentioned discrepancies
could be reported and fixed accordingly.

Fixes: db388348acff ("PCI: dwc: Convert struct pcie_port.msi_irq to an array")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
 drivers/pci/controller/dwc/pcie-designware-host.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 20c9333bcb1c..f163f5b6ad3d 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -357,6 +357,8 @@ int dw_pcie_msi_host_init(struct dw_pcie_rp *pp)
 		if (pp->msi_irq[ctrl] > 0)
 			irq_set_chained_handler_and_data(pp->msi_irq[ctrl],
 						    dw_chained_msi_isr, pp);
+		else
+			dev_warn(dev, "MSI ctrl %d doesn't have platform IRQ in DT", ctrl);
 	}
 
 	/*
-- 
2.48.1

On Thu, 30 Oct 2025 22:43:46 +0530, Manivannan Sadhasivam wrote:
> The internal MSI controller in DWC IPs supports multiple MSI ctrls, each
> capable of receiving 32 MSI vectors per ctrl. And each MSI ctrl requires a
> dedicated MSI platform IRQ in devicetree to function. Otherwise, MSIs won't
> be received from the endpoints.
> 
> Currently, dw_pcie_msi_host_init() only registers the IRQ handler if the
> MSI ctrl has the associated MSI platform IRQ in DT. But it doesn't warn if
> the IRQ is not available. This may cause developers/users to believe that
> the platform supports MSI vectors from all MSI ctrls, but it doesn't.
> 
> [...]

Applied, thanks!

[1/1] PCI: dwc: Warn if the MSI ctrl doesn't have an associated platform IRQ in DT
      commit: 571dd53fca80508de39cb2edc49a43be3ea5ae12

Best regards,
-- 
Manivannan Sadhasivam <mani@kernel.org>

On Sat, Nov 08, 2025 at 03:48:21PM +0530, Manivannan Sadhasivam wrote:
> 
> On Thu, 30 Oct 2025 22:43:46 +0530, Manivannan Sadhasivam wrote:
> > The internal MSI controller in DWC IPs supports multiple MSI ctrls, each
> > capable of receiving 32 MSI vectors per ctrl. And each MSI ctrl requires a
> > dedicated MSI platform IRQ in devicetree to function. Otherwise, MSIs won't
> > be received from the endpoints.
> > 
> > Currently, dw_pcie_msi_host_init() only registers the IRQ handler if the
> > MSI ctrl has the associated MSI platform IRQ in DT. But it doesn't warn if
> > the IRQ is not available. This may cause developers/users to believe that
> > the platform supports MSI vectors from all MSI ctrls, but it doesn't.
> > 
> > [...]
> 
> Applied, thanks!
> 
> [1/1] PCI: dwc: Warn if the MSI ctrl doesn't have an associated platform IRQ in DT
>       commit: 571dd53fca80508de39cb2edc49a43be3ea5ae12
> 

Alex brought it to my attention offline that a vendor implementation may support
a single IRQ for all 256 MSIs. I checked the spec again and indeed they mention
the possibility in the Figure 3-24 of r4.30 of the DWC databook. It was not
mentioned in the wording anywhere, but the figure was explicit.

Hence, this patch is wrong. So I've dropped it now.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

On 10/30/25 12:13 PM, Manivannan Sadhasivam wrote:
> The internal MSI controller in DWC IPs supports multiple MSI ctrls, each
> capable of receiving 32 MSI vectors per ctrl. And each MSI ctrl requires a
> dedicated MSI platform IRQ in devicetree to function. Otherwise, MSIs won't
> be received from the endpoints.
> 
> Currently, dw_pcie_msi_host_init() only registers the IRQ handler if the
> MSI ctrl has the associated MSI platform IRQ in DT. But it doesn't warn if
> the IRQ is not available. This may cause developers/users to believe that
> the platform supports MSI vectors from all MSI ctrls, but it doesn't.
> 
> This discrepancy can happen due to two reasons:
> 
> 1. Controller driver incorrectly set the dw_pcie_rp::num_vectors field.
> 2. DT missed specifying the MSI IRQs
> 
> To catch these, add a warning so that the above mentioned discrepancies
> could be reported and fixed accordingly.
> 
> Fixes: db388348acff ("PCI: dwc: Convert struct pcie_port.msi_irq to an array")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>


Reviewed-by: Alex Elder <elder@riscstar.com>
Tested-by: Alex Elder <elder@riscstar.com>


> ---
>   drivers/pci/controller/dwc/pcie-designware-host.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 20c9333bcb1c..f163f5b6ad3d 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -357,6 +357,8 @@ int dw_pcie_msi_host_init(struct dw_pcie_rp *pp)
>   		if (pp->msi_irq[ctrl] > 0)
>   			irq_set_chained_handler_and_data(pp->msi_irq[ctrl],
>   						    dw_chained_msi_isr, pp);
> +		else
> +			dev_warn(dev, "MSI ctrl %d doesn't have platform IRQ in DT", ctrl);
>   	}
>   
>   	/*