For the external PHY devices, NETC provide external MDIO interface to
manage them. ENETC can use a set of MDIO registers provided by EMDIO to
access its PHY, which is a method currently supported by the driver. It
also can use its own set of MDIO registers to access its PHY, but the
premise is that its corresponding LaBCR[MDIO_PHYAD_PRTAD] needs to be
set correctly, which indicates its PHY address.

Similar to the external MDIO registers, each ENETC has a set of internal
MDIO registers to access its on-die PHY (PCS), so internal MDIO support
is also added.

Aziz Sellami (1):
  net: enetc: set external MDIO PHY address for i.MX95 ENETC

Wei Fang (2):
  net: enetc: set external MDIO PHY address for i.MX94 ENETC
  net: enetc: add port MDIO support for ENETC v4

 .../net/ethernet/freescale/enetc/enetc4_hw.h  |   6 +
 .../freescale/enetc/enetc_pf_common.c         |  14 ++-
 .../ethernet/freescale/enetc/netc_blk_ctrl.c  | 111 +++++++++++++++++-
 3 files changed, 128 insertions(+), 3 deletions(-)

-- 
2.34.1

> Similar to the external MDIO registers, each ENETC has a set of internal
> MDIO registers to access its on-die PHY (PCS), so internal MDIO support
> is also added.

Any reason to not just hard code it to 0?
What is the reset default?

DT describes hardware, not configuration. So getting this from DT
seems wrong.

    Andrew