From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
Add Device Tree binding documentation for the Eswin EIC7700 PCIe
controller module, the PCIe controller enables the core to correctly
initialize and manage the PCIe bus and connected devices.
Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
---
.../bindings/pci/eswin,eic7700-pcie.yaml | 166 ++++++++++++++++++
.../bindings/pci/snps,dw-pcie-common.yaml | 2 +-
2 files changed, 167 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
new file mode 100644
index 000000000000..e6c05e3a093a
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
@@ -0,0 +1,166 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 PCIe host controller
+
+maintainers:
+ - Yu Ning <ningyu@eswincomputing.com>
+ - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
+ - Yanghui Ou <ouyanghui@eswincomputing.com>
+
+description:
+ The PCIe controller on EIC7700 SoC.
+
+properties:
+ compatible:
+ const: eswin,eic7700-pcie
+
+ reg:
+ maxItems: 3
+
+ reg-names:
+ items:
+ - const: dbi
+ - const: config
+ - const: mgmt
+
+ ranges:
+ maxItems: 3
+
+ '#interrupt-cells':
+ const: 1
+
+ interrupt-names:
+ items:
+ - const: msi
+ - const: inta
+ - const: intb
+ - const: intc
+ - const: intd
+
+ interrupt-map:
+ maxItems: 4
+
+ interrupt-map-mask:
+ items:
+ - const: 0
+ - const: 0
+ - const: 0
+ - const: 7
+
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: mstr
+ - const: dbi
+ - const: pclk
+ - const: aux
+
+ resets:
+ maxItems: 2
+
+ reset-names:
+ items:
+ - const: dbi
+ - const: powerup
+
+patternProperties:
+ "^pcie@":
+ type: object
+ $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+
+ num-lanes:
+ maximum: 4
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: perst
+
+ required:
+ - reg
+ - ranges
+ - num-lanes
+ - resets
+ - reset-names
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - interrupts
+ - interrupt-names
+ - interrupt-map-mask
+ - interrupt-map
+ - '#interrupt-cells'
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+allOf:
+ - $ref: /schemas/pci/snps,dw-pcie.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pcie@54000000 {
+ compatible = "eswin,eic7700-pcie";
+ reg = <0x0 0x54000000 0x0 0x4000000>,
+ <0x0 0x40000000 0x0 0x800000>,
+ <0x0 0x50000000 0x0 0x100000>;
+ reg-names = "dbi", "config", "mgmt";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
+ <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
+ <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
+ bus-range = <0x00 0xff>;
+ clocks = <&clock 144>,
+ <&clock 145>,
+ <&clock 146>,
+ <&clock 147>;
+ clock-names = "mstr", "dbi", "pclk", "aux";
+ resets = <&reset 97>,
+ <&reset 98>;
+ reset-names = "dbi", "powerup";
+ interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
+ interrupt-names = "msi", "inta", "intb", "intc", "intd";
+ interrupt-parent = <&plic>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
+ <0x0 0x0 0x0 0x2 &plic 180>,
+ <0x0 0x0 0x0 0x3 &plic 181>,
+ <0x0 0x0 0x0 0x4 &plic 182>;
+ device_type = "pci";
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ device_type = "pci";
+ num-lanes = <4>;
+ resets = <&reset 99>;
+ reset-names = "perst";
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
index 34594972d8db..cff52d0026b0 100644
--- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
@@ -176,7 +176,7 @@ properties:
- description: See native 'phy' reset for details
enum: [ pciephy, link ]
- description: See native 'pwr' reset for details
- enum: [ turnoff ]
+ enum: [ turnoff, powerup ]
phys:
description:
--
2.25.1On Thu, Oct 30, 2025 at 04:30:57PM +0800, zhangsenchuan@eswincomputing.com wrote:
> From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
>
> Add Device Tree binding documentation for the Eswin EIC7700 PCIe
> controller module, the PCIe controller enables the core to correctly
> initialize and manage the PCIe bus and connected devices.
>
> Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> ---
> .../bindings/pci/eswin,eic7700-pcie.yaml | 166 ++++++++++++++++++
> .../bindings/pci/snps,dw-pcie-common.yaml | 2 +-
> 2 files changed, 167 insertions(+), 1 deletion(-)
> create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> new file mode 100644
> index 000000000000..e6c05e3a093a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> @@ -0,0 +1,166 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 PCIe host controller
> +
> +maintainers:
> + - Yu Ning <ningyu@eswincomputing.com>
> + - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> + - Yanghui Ou <ouyanghui@eswincomputing.com>
> +
> +description:
> + The PCIe controller on EIC7700 SoC.
> +
> +properties:
> + compatible:
> + const: eswin,eic7700-pcie
> +
> + reg:
> + maxItems: 3
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: config
> + - const: mgmt
That's deprecated. Read its description. That's just elbi.
> +
> + ranges:
> + maxItems: 3
> +
> + '#interrupt-cells':
> + const: 1
> +
> + interrupt-names:
> + items:
> + - const: msi
> + - const: inta
> + - const: intb
> + - const: intc
> + - const: intd
Thse are legacy signals. Why are you using legacy?
> +
> + interrupt-map:
> + maxItems: 4
> +
> + interrupt-map-mask:
> + items:
> + - const: 0
> + - const: 0
> + - const: 0
> + - const: 7
> +
> + clocks:
> + maxItems: 4
> +
> + clock-names:
> + items:
> + - const: mstr
> + - const: dbi
> + - const: pclk
Deprecated name.
> + - const: aux
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: dbi
> + - const: powerup
No such name.
> +
> +patternProperties:
> + "^pcie@":
> + type: object
> + $ref: /schemas/pci/pci-pci-bridge.yaml#
> +
> + properties:
> + reg:
> + maxItems: 1
> +
> + num-lanes:
> + maximum: 4
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: perst
> +
> + required:
> + - reg
> + - ranges
> + - num-lanes
> + - resets
> + - reset-names
> +
> + unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - ranges
> + - interrupts
> + - interrupt-names
> + - interrupt-map-mask
> + - interrupt-map
> + - '#interrupt-cells'
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +allOf:
> + - $ref: /schemas/pci/snps,dw-pcie.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie@54000000 {
> + compatible = "eswin,eic7700-pcie";
> + reg = <0x0 0x54000000 0x0 0x4000000>,
> + <0x0 0x40000000 0x0 0x800000>,
> + <0x0 0x50000000 0x0 0x100000>;
> + reg-names = "dbi", "config", "mgmt";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
> + <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
> + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
> + bus-range = <0x00 0xff>;
> + clocks = <&clock 144>,
> + <&clock 145>,
> + <&clock 146>,
> + <&clock 147>;
> + clock-names = "mstr", "dbi", "pclk", "aux";
> + resets = <&reset 97>,
> + <&reset 98>;
> + reset-names = "dbi", "powerup";
> + interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
> + interrupt-names = "msi", "inta", "intb", "intc", "intd";
> + interrupt-parent = <&plic>;
> + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> + interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
> + <0x0 0x0 0x0 0x2 &plic 180>,
> + <0x0 0x0 0x0 0x3 &plic 181>,
> + <0x0 0x0 0x0 0x4 &plic 182>;
> + device_type = "pci";
> + pcie@0 {
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + device_type = "pci";
> + num-lanes = <4>;
> + resets = <&reset 99>;
> + reset-names = "perst";
> + };
> + };
> + };
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> index 34594972d8db..cff52d0026b0 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> @@ -176,7 +176,7 @@ properties:
> - description: See native 'phy' reset for details
> enum: [ pciephy, link ]
> - description: See native 'pwr' reset for details
> - enum: [ turnoff ]
> + enum: [ turnoff, powerup ]
NAK, you cannot add more deprecated names. Do you understand what
deprecated/legacy mean?
Best regards,
Krzysztof
> -----Original Messages-----
> From: "Krzysztof Kozlowski" <krzk@kernel.org>
> Send time:Monday, 03/11/2025 16:48:02
> To: zhangsenchuan@eswincomputing.com
> Cc: bhelgaas@google.com, mani@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, christian.bruel@foss.st.com, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com
> Subject: Re: [PATCH v4 1/2] dt-bindings: PCI: EIC7700: Add Eswin PCIe host controller
>
> On Thu, Oct 30, 2025 at 04:30:57PM +0800, zhangsenchuan@eswincomputing.com wrote:
> > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> >
> > Add Device Tree binding documentation for the Eswin EIC7700 PCIe
> > controller module, the PCIe controller enables the core to correctly
> > initialize and manage the PCIe bus and connected devices.
> >
> > Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> > Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> > Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > ---
> > .../bindings/pci/eswin,eic7700-pcie.yaml | 166 ++++++++++++++++++
> > .../bindings/pci/snps,dw-pcie-common.yaml | 2 +-
> > 2 files changed, 167 insertions(+), 1 deletion(-)
> > create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> > new file mode 100644
> > index 000000000000..e6c05e3a093a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> > @@ -0,0 +1,166 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Eswin EIC7700 PCIe host controller
> > +
> > +maintainers:
> > + - Yu Ning <ningyu@eswincomputing.com>
> > + - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > + - Yanghui Ou <ouyanghui@eswincomputing.com>
> > +
> > +description:
> > + The PCIe controller on EIC7700 SoC.
> > +
> > +properties:
> > + compatible:
> > + const: eswin,eic7700-pcie
> > +
> > + reg:
> > + maxItems: 3
> > +
> > + reg-names:
> > + items:
> > + - const: dbi
> > + - const: config
> > + - const: mgmt
>
> That's deprecated. Read its description. That's just elbi.
>
> > +
> > + ranges:
> > + maxItems: 3
> > +
> > + '#interrupt-cells':
> > + const: 1
> > +
> > + interrupt-names:
> > + items:
> > + - const: msi
> > + - const: inta
> > + - const: intb
> > + - const: intc
> > + - const: intd
>
> Thse are legacy signals. Why are you using legacy?
>
> > +
> > + interrupt-map:
> > + maxItems: 4
> > +
> > + interrupt-map-mask:
> > + items:
> > + - const: 0
> > + - const: 0
> > + - const: 0
> > + - const: 7
> > +
> > + clocks:
> > + maxItems: 4
> > +
> > + clock-names:
> > + items:
> > + - const: mstr
> > + - const: dbi
> > + - const: pclk
>
> Deprecated name.
>
> > + - const: aux
> > +
> > + resets:
> > + maxItems: 2
> > +
> > + reset-names:
> > + items:
> > + - const: dbi
> > + - const: powerup
>
> No such name.
>
> > +
> > +patternProperties:
> > + "^pcie@":
> > + type: object
> > + $ref: /schemas/pci/pci-pci-bridge.yaml#
> > +
> > + properties:
> > + reg:
> > + maxItems: 1
> > +
> > + num-lanes:
> > + maximum: 4
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + reset-names:
> > + items:
> > + - const: perst
> > +
> > + required:
> > + - reg
> > + - ranges
> > + - num-lanes
> > + - resets
> > + - reset-names
> > +
> > + unevaluatedProperties: false
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - ranges
> > + - interrupts
> > + - interrupt-names
> > + - interrupt-map-mask
> > + - interrupt-map
> > + - '#interrupt-cells'
> > + - clocks
> > + - clock-names
> > + - resets
> > + - reset-names
> > +
> > +allOf:
> > + - $ref: /schemas/pci/snps,dw-pcie.yaml#
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + pcie@54000000 {
> > + compatible = "eswin,eic7700-pcie";
> > + reg = <0x0 0x54000000 0x0 0x4000000>,
> > + <0x0 0x40000000 0x0 0x800000>,
> > + <0x0 0x50000000 0x0 0x100000>;
> > + reg-names = "dbi", "config", "mgmt";
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + #interrupt-cells = <1>;
> > + ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
> > + <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
> > + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
> > + bus-range = <0x00 0xff>;
> > + clocks = <&clock 144>,
> > + <&clock 145>,
> > + <&clock 146>,
> > + <&clock 147>;
> > + clock-names = "mstr", "dbi", "pclk", "aux";
> > + resets = <&reset 97>,
> > + <&reset 98>;
> > + reset-names = "dbi", "powerup";
> > + interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
> > + interrupt-names = "msi", "inta", "intb", "intc", "intd";
> > + interrupt-parent = <&plic>;
> > + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> > + interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
> > + <0x0 0x0 0x0 0x2 &plic 180>,
> > + <0x0 0x0 0x0 0x3 &plic 181>,
> > + <0x0 0x0 0x0 0x4 &plic 182>;
> > + device_type = "pci";
> > + pcie@0 {
> > + reg = <0x0 0x0 0x0 0x0 0x0>;
> > + #address-cells = <3>;
> > + #size-cells = <2>;
> > + ranges;
> > + device_type = "pci";
> > + num-lanes = <4>;
> > + resets = <&reset 99>;
> > + reset-names = "perst";
> > + };
> > + };
> > + };
> > diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> > index 34594972d8db..cff52d0026b0 100644
> > --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> > +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> > @@ -176,7 +176,7 @@ properties:
> > - description: See native 'phy' reset for details
> > enum: [ pciephy, link ]
> > - description: See native 'pwr' reset for details
> > - enum: [ turnoff ]
> > + enum: [ turnoff, powerup ]
>
> NAK, you cannot add more deprecated names. Do you understand what
> deprecated/legacy mean?
>
Hi, Krzysztof
Thank you for your reminder. I misunderstood deprecated/legacy.
I have submitted the pcie v5 pacth and made the modifications.
Kind regards,
Senchuan Zhang
On Mon, Nov 03, 2025 at 09:48:02AM +0100, Krzysztof Kozlowski wrote: > On Thu, Oct 30, 2025 at 04:30:57PM +0800, zhangsenchuan@eswincomputing.com wrote: > > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com> > > > > Add Device Tree binding documentation for the Eswin EIC7700 PCIe > > controller module, the PCIe controller enables the core to correctly > > initialize and manage the PCIe bus and connected devices. > > > > Signed-off-by: Yu Ning <ningyu@eswincomputing.com> > > Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com> > > Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com> > > --- > > .../bindings/pci/eswin,eic7700-pcie.yaml | 166 ++++++++++++++++++ > > .../bindings/pci/snps,dw-pcie-common.yaml | 2 +- > > 2 files changed, 167 insertions(+), 1 deletion(-) > > create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > > > > diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > > new file mode 100644 > > index 000000000000..e6c05e3a093a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > > @@ -0,0 +1,166 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Eswin EIC7700 PCIe host controller > > + > > +maintainers: > > + - Yu Ning <ningyu@eswincomputing.com> > > + - Senchuan Zhang <zhangsenchuan@eswincomputing.com> > > + - Yanghui Ou <ouyanghui@eswincomputing.com> > > + > > +description: > > + The PCIe controller on EIC7700 SoC. > > + > > +properties: > > + compatible: > > + const: eswin,eic7700-pcie > > + > > + reg: > > + maxItems: 3 > > + > > + reg-names: > > + items: > > + - const: dbi > > + - const: config > > + - const: mgmt > > That's deprecated. Read its description. That's just elbi. > > > + > > + ranges: > > + maxItems: 3 > > + > > + '#interrupt-cells': > > + const: 1 > > + > > + interrupt-names: > > + items: > > + - const: msi > > + - const: inta > > + - const: intb > > + - const: intc > > + - const: intd > > Thse are legacy signals. Why are you using legacy? > Why not? These INTx signals are still supported by many host platforms/devices. These are not individual out-of-band signals, but just in-band messages. It is perfectly fine for a host controller to support them. - Mani -- மணிவண்ணன் சதாசிவம்
On 03/11/2025 10:02, Manivannan Sadhasivam wrote: >>> + interrupt-names: >>> + items: >>> + - const: msi >>> + - const: inta >>> + - const: intb >>> + - const: intc >>> + - const: intd >> >> Thse are legacy signals. Why are you using legacy? >> > > Why not? These INTx signals are still supported by many host platforms/devices. > These are not individual out-of-band signals, but just in-band messages. It is > perfectly fine for a host controller to support them. Considering how many other legacy things were used in this binding, I just have doubts that choice of entries was correct. Best regards, Krzysztof
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