drivers/pci/controller/dwc/pcie-designware-host.c | 13 +- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 220 ++++++++++++++++++---- 2 files changed, 198 insertions(+), 35 deletions(-)
I've recently been working on fixing up at least basic system suspend
support on the Rockchip RK3576 platform. Currently the biggest open
issue is missing support in the PCIe driver. This series is a follow-up
for Shawn Lin's series with feedback from Niklas Cassel and Manivannan
Sadhasivam being handled as well as some of my own changes fixing up
things I noticed.
In opposite to Shawn Lin I did not test with different peripherals as my
main goal is getting basic suspend to ram working in the first place. I
did notice issues with the Broadcom WLAN card on the RK3576 EVB.
Suspending that platform without a driver being probed works, but after
probing brcmfmac suspend is aborted because brcmf_pcie_pm_enter_D3()
does not work. As far as I can tell the problem is unrelated to the
Rockchip PCIe driver.
Changes since PATCHv3:
* https://lore.kernel.org/linux-pci/1744940759-23823-1-git-send-email-shawn.lin@rock-chips.com/
* rename rockchip_pcie_get_ltssm to rockchip_pcie_get_ltssm_status_reg
in a separate patch (Niklas Cassel)
* rename rockchip_pcie_get_pure_ltssm to rockchip_pcie_get_ltssm_state
in a separate patch (Niklas Cassel)
* Move devm_phy_get out of phy_init to probe in a separate patch
(Manivannan Sadhasivam)
* Add helper function for enhanced LTSSM control mode in a separate patch
(Niklas Cassel)
* Add helper function for controller mode in a separate patch
(Niklas Cassel)
* Add helper function for DDL indicator in a separate patch
(Niklas Cassel)
* Move rockchip_pcie_pme_turn_off implementation in a separate patch
* Rebase to v6.18-rc3 using new FIELD_PREP_WM16()
* Improve readability of PME_TURN_OFF/PME_TO_ACK defines (Manivannan Sadhasivam)
* Fix usage of reverse Xmas (Manivannan Sadhasivam)
* Assert PERST# before turning off other resources (Manivannan Sadhasivam)
* Improve some error messages (Manivannan Sadhasivam)
* Rename goto labels as per their purpose (Manivannan Sadhasivam)
* Add extra patch for dw_pcie_resume_noirq, since I've seen errors
during resume on boards not having anything plugged into their PCIe
port
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
Sebastian Reichel (9):
PCI: dw-rockchip: Rename rockchip_pcie_get_ltssm function
PCI: dw-rockchip: Support get_ltssm operation
PCI: dw-rockchip: Move devm_phy_get out of phy_init
PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode
PCI: dw-rockchip: Add helper function for controller mode
PCI: dw-rockchip: Add helper function for DDL indicator
PCI: dw-rockchip: Add pme_turn_off support
PCI: dw-rockchip: Add system PM support
PCI: dwc: support missing PCIe device on resume
drivers/pci/controller/dwc/pcie-designware-host.c | 13 +-
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 220 ++++++++++++++++++----
2 files changed, 198 insertions(+), 35 deletions(-)
---
base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa
change-id: 20251028-rockchip-pcie-system-suspend-86cf08a7b229
Best regards,
--
Sebastian Reichel <sebastian.reichel@collabora.com>
Hi Sebastian, On Wed, 29 Oct 2025 at 23:27, Sebastian Reichel <sebastian.reichel@collabora.com> wrote: > > I've recently been working on fixing up at least basic system suspend > support on the Rockchip RK3576 platform. Currently the biggest open > issue is missing support in the PCIe driver. This series is a follow-up > for Shawn Lin's series with feedback from Niklas Cassel and Manivannan > Sadhasivam being handled as well as some of my own changes fixing up > things I noticed. > > In opposite to Shawn Lin I did not test with different peripherals as my > main goal is getting basic suspend to ram working in the first place. I > did notice issues with the Broadcom WLAN card on the RK3576 EVB. > Suspending that platform without a driver being probed works, but after > probing brcmfmac suspend is aborted because brcmf_pcie_pm_enter_D3() > does not work. As far as I can tell the problem is unrelated to the > Rockchip PCIe driver. > Well, I gave it a try on Radxa Rock 5b, I am observing the falling warning. PM: noirq suspend of devices failed alarm@rockpi-5b:~$ sudo systemctl suspend [sudo] password for alarm: alarm@rockpi-5b:~$ [ 459.301536][ T6149] wlan0: deauthenticating from 78:d2:94:85:bb:b2 by local choice (Reason: 3=DEAUTH_LEAVING) [ 459.383823][ T6056] r8169 0004:41:00.0 enP4p65s0: Link is Down [ 459.384568][ T6056] r8169 0004:41:00.0: disabling bus mastering [ 459.862229][ T6291] PM: suspend entry (deep) [ 459.935040][ T6291] Filesystems sync: 0.072 seconds [ 459.941444][ T6253] (NULL device *): loading /lib/firmware/6.18.0-rc3-3-ARM64-GCC/intel/ibt-12-16.sfi failed with error -20 [ 459.943775][ T6253] (NULL device *): loading /lib/firmware/6.18.0-rc3-3-ARM64-GCC/intel/ibt-12-16.ddc failed with error -20 [ 459.945047][ T59] (NULL device *): loading /lib/firmware/6.18.0-rc3-3-ARM64-GCC/arm/mali/arch10.8/mali_csffw.bin failed with error -20 [ 459.946854][ T6253] (NULL device *): loading /lib/firmware/6.18.0-rc3-3-ARM64-GCC/iwlwifi-8265-36.ucode failed with error -20 [ 459.953052][ T6291] Freezing user space processes [ 460.001306][ T6291] Freezing user space processes completed (elapsed 0.047 seconds) [ 460.001993][ T6291] OOM killer disabled. [ 460.002341][ T6291] Freezing remaining freezable tasks [ 460.004202][ T6291] Freezing remaining freezable tasks completed (elapsed 0.001 seconds) [ 460.004953][ T6291] printk: Suspending console(s) (use no_console_suspend to debug) [ 460.070242][ T6253] nvme 0000:01:00.0: save config 0x00: 0xa808144d [ 460.070261][ T6253] nvme 0000:01:00.0: save config 0x04: 0x00100406 [ 460.070272][ T6253] nvme 0000:01:00.0: save config 0x08: 0x01080200 [ 460.070281][ T6253] nvme 0000:01:00.0: save config 0x0c: 0x00000000 [ 460.070291][ T6253] nvme 0000:01:00.0: save config 0x10: 0xf0200004 [ 460.070300][ T6253] nvme 0000:01:00.0: save config 0x14: 0x00000000 [ 460.070309][ T6253] nvme 0000:01:00.0: save config 0x18: 0x00000000 [ 460.070319][ T6253] nvme 0000:01:00.0: save config 0x1c: 0x00000000 [ 460.070328][ T6253] nvme 0000:01:00.0: save config 0x20: 0x00000000 [ 460.070337][ T6253] nvme 0000:01:00.0: save config 0x24: 0x00000000 [ 460.070346][ T6253] nvme 0000:01:00.0: save config 0x28: 0x00000000 [ 460.070355][ T6253] nvme 0000:01:00.0: save config 0x2c: 0xa801144d [ 460.070364][ T6253] nvme 0000:01:00.0: save config 0x30: 0x00000000 [ 460.070373][ T6253] nvme 0000:01:00.0: save config 0x34: 0x00000040 [ 460.070383][ T6253] nvme 0000:01:00.0: save config 0x38: 0x00000000 [ 460.070392][ T6253] nvme 0000:01:00.0: save config 0x3c: 0x0000016d [ 460.274027][ T6253] iwlwifi 0002:21:00.0: save config 0x00: 0x24fd8086 [ 460.274058][ T6253] iwlwifi 0002:21:00.0: save config 0x04: 0x00100406 [ 460.274080][ T6253] iwlwifi 0002:21:00.0: save config 0x08: 0x02800078 [ 460.274102][ T6253] iwlwifi 0002:21:00.0: save config 0x0c: 0x00000000 [ 460.274124][ T6253] iwlwifi 0002:21:00.0: save config 0x10: 0xf2200004 [ 460.274146][ T6253] iwlwifi 0002:21:00.0: save config 0x14: 0x00000000 [ 460.274168][ T6253] iwlwifi 0002:21:00.0: save config 0x18: 0x00000000 [ 460.274189][ T6253] iwlwifi 0002:21:00.0: save config 0x1c: 0x00000000 [ 460.274210][ T6253] iwlwifi 0002:21:00.0: save config 0x20: 0x00000000 [ 460.274232][ T6253] iwlwifi 0002:21:00.0: save config 0x24: 0x00000000 [ 460.274253][ T6253] iwlwifi 0002:21:00.0: save config 0x28: 0x00000000 [ 460.274275][ T6253] iwlwifi 0002:21:00.0: save config 0x2c: 0x10108086 [ 460.274296][ T6253] iwlwifi 0002:21:00.0: save config 0x30: 0x00000000 [ 460.274318][ T6253] iwlwifi 0002:21:00.0: save config 0x34: 0x000000c8 [ 460.274340][ T6253] iwlwifi 0002:21:00.0: save config 0x38: 0x00000000 [ 460.274361][ T6253] iwlwifi 0002:21:00.0: save config 0x3c: 0x00000183 [ 460.274917][ T6300] r8169 0004:41:00.0: save config 0x00: 0x812510ec [ 460.274927][ T6300] r8169 0004:41:00.0: save config 0x04: 0x00100403 [ 460.274937][ T6300] r8169 0004:41:00.0: save config 0x08: 0x02000005 [ 460.274947][ T6300] r8169 0004:41:00.0: save config 0x0c: 0x00000010 [ 460.274957][ T6300] r8169 0004:41:00.0: save config 0x10: 0xf4100001 [ 460.274967][ T6300] r8169 0004:41:00.0: save config 0x14: 0x00000000 [ 460.274977][ T6300] r8169 0004:41:00.0: save config 0x18: 0xf4200004 [ 460.274987][ T6300] r8169 0004:41:00.0: save config 0x1c: 0x00000000 [ 460.274996][ T6300] r8169 0004:41:00.0: save config 0x20: 0xf4210004 [ 460.275006][ T6300] r8169 0004:41:00.0: save config 0x24: 0x00000000 [ 460.275016][ T6300] r8169 0004:41:00.0: save config 0x28: 0x00000000 [ 460.275026][ T6300] r8169 0004:41:00.0: save config 0x2c: 0x012310ec [ 460.275036][ T6300] r8169 0004:41:00.0: save config 0x30: 0x00000000 [ 460.275045][ T6300] r8169 0004:41:00.0: save config 0x34: 0x00000040 [ 460.275055][ T6300] r8169 0004:41:00.0: save config 0x38: 0x00000000 [ 460.275065][ T6300] r8169 0004:41:00.0: save config 0x3c: 0x00000197 [ 460.285117][ T6253] iwlwifi 0002:21:00.0: PCI PM: Suspend power state: D3hot [ 460.287498][ T6300] r8169 0004:41:00.0: PCI PM: Suspend power state: D3hot [ 460.287631][ T6296] pcieport 0004:40:00.0: save config 0x00: 0x35881d87 [ 460.287644][ T6296] pcieport 0004:40:00.0: save config 0x04: 0x00100507 [ 460.287651][ T6296] pcieport 0004:40:00.0: save config 0x08: 0x06040001 [ 460.287658][ T6296] pcieport 0004:40:00.0: save config 0x0c: 0x00010000 [ 460.287664][ T6296] pcieport 0004:40:00.0: save config 0x10: 0x00000000 [ 460.287671][ T6296] pcieport 0004:40:00.0: save config 0x14: 0x00000000 [ 460.287677][ T6296] pcieport 0004:40:00.0: save config 0x18: 0x00414140 [ 460.287683][ T6296] pcieport 0004:40:00.0: save config 0x1c: 0x00000000 [ 460.287689][ T6296] pcieport 0004:40:00.0: save config 0x20: 0xf420f420 [ 460.287696][ T6296] pcieport 0004:40:00.0: save config 0x24: 0x0001fff1 [ 460.287702][ T6296] pcieport 0004:40:00.0: save config 0x28: 0x00000000 [ 460.287708][ T6296] pcieport 0004:40:00.0: save config 0x2c: 0x00000000 [ 460.287714][ T6296] pcieport 0004:40:00.0: save config 0x30: 0x00000000 [ 460.287720][ T6296] pcieport 0004:40:00.0: save config 0x34: 0x00000040 [ 460.287727][ T6296] pcieport 0004:40:00.0: save config 0x38: 0x00000000 [ 460.287733][ T6296] pcieport 0004:40:00.0: save config 0x3c: 0x00020197 [ 460.299895][ T6296] pcieport 0004:40:00.0: PCI PM: Suspend power state: D3hot [ 460.311927][ T6291] rockchip-dw-pcie a41000000.pcie: Timeout waiting for L2 entry! LTSSM: 0x12 [ 460.311935][ T6291] rockchip-dw-pcie a41000000.pcie: PM: dpm_run_callback(): genpd_suspend_noirq returns -110 [ 460.311950][ T6291] rockchip-dw-pcie a41000000.pcie: PM: failed to suspend noirq: error -110 [ 460.328691][ T57] pcieport 0004:40:00.0: restore config 0x2c: 0x00000000 -> 0x00000000 [ 460.328706][ T57] pcieport 0004:40:00.0: restore config 0x28: 0x00000000 -> 0x00000000 [ 460.328714][ T57] pcieport 0004:40:00.0: restore config 0x24: 0x0001fff1 -> 0x0001fff1 [ 460.329363][ T6299] iwlwifi 0002:21:00.0: restore config 0x3c: 0x00000100 -> 0x00000183 [ 460.329558][ T6299] iwlwifi 0002:21:00.0: restore config 0x10: 0x00000004 -> 0xf2200004 [ 460.329643][ T6299] iwlwifi 0002:21:00.0: restore config 0x04: 0x00100000 -> 0x00100406 [ 460.341978][ T6291] PM: noirq suspend of devices failed [ 460.352925][ T6303] xhci-hcd xhci-hcd.7.auto: xHC error in resume, USBSTS 0x401, Reinit [ 460.352937][ T6303] usb usb5: root hub lost power or was reset [ 460.352941][ T6303] usb usb6: root hub lost power or was reset [ 460.517043][ T56] xhci-hcd xhci-hcd.8.auto: xHC error in resume, USBSTS 0x401, Reinit [ 460.517056][ T56] usb usb7: root hub lost power or was reset [ 460.517060][ T56] usb usb8: root hub lost power or was reset [ 460.833660][ T6291] OOM killer enabled. [ 460.834002][ T6291] Restarting tasks: Starting [ 460.835432][ T6291] Restarting tasks: Done [ 460.835846][ T6291] random: crng reseeded on system resumption [ 460.837377][ T6291] PM: suspend exit [ 460.838167][ T6291] PM: suspend entry (s2idle) [ 460.976541][ T6291] Filesystems sync: 0.138 seconds [ 460.978668][ T6291] Freezing user space processes [ 460.980928][ T6291] Freezing user space processes completed (elapsed 0.001 seconds) [ 460.981607][ T6291] OOM killer disabled. [ 460.981954][ T6291] Freezing remaining freezable tasks [ 460.997394][ T6291] Freezing remaining freezable tasks completed (elapsed 0.014 seconds) [ 460.998116][ T6291] printk: Suspending console(s) (use no_console_suspend to debug) [ 461.041501][ T6299] nvme 0000:01:00.0: save config 0x00: 0xa808144d [ 461.041520][ T6299] nvme 0000:01:00.0: save config 0x04: 0x00100406 [ 461.041530][ T6299] nvme 0000:01:00.0: save config 0x08: 0x01080200 [ 461.041540][ T6299] nvme 0000:01:00.0: save config 0x0c: 0x00000000 [ 461.041549][ T6299] nvme 0000:01:00.0: save config 0x10: 0xf0200004 [ 461.041559][ T6299] nvme 0000:01:00.0: save config 0x14: 0x00000000 [ 461.041568][ T6299] nvme 0000:01:00.0: save config 0x18: 0x00000000 [ 461.041577][ T6299] nvme 0000:01:00.0: save config 0x1c: 0x00000000 [ 461.041586][ T6299] nvme 0000:01:00.0: save config 0x20: 0x00000000 [ 461.041595][ T6299] nvme 0000:01:00.0: save config 0x24: 0x00000000 [ 461.041604][ T6299] nvme 0000:01:00.0: save config 0x28: 0x00000000 [ 461.041613][ T6299] nvme 0000:01:00.0: save config 0x2c: 0xa801144d [ 461.041622][ T6299] nvme 0000:01:00.0: save config 0x30: 0x00000000 [ 461.041632][ T6299] nvme 0000:01:00.0: save config 0x34: 0x00000040 [ 461.041641][ T6299] nvme 0000:01:00.0: save config 0x38: 0x00000000 [ 461.041650][ T6299] nvme 0000:01:00.0: save config 0x3c: 0x0000016d [ 461.211199][ T6307] r8169 0004:41:00.0: save config 0x00: 0x812510ec [ 461.211220][ T6307] r8169 0004:41:00.0: save config 0x04: 0x00100403 [ 461.211233][ T6307] r8169 0004:41:00.0: save config 0x08: 0x02000005 [ 461.211246][ T6307] r8169 0004:41:00.0: save config 0x0c: 0x00000010 [ 461.211257][ T6307] r8169 0004:41:00.0: save config 0x10: 0xf4100001 [ 461.211269][ T6307] r8169 0004:41:00.0: save config 0x14: 0x00000000 [ 461.211294][ T6297] iwlwifi 0002:21:00.0: save config 0x00: 0x24fd8086 [ 461.211298][ T6307] r8169 0004:41:00.0: save config 0x18: 0xf4200004 [ 461.211311][ T6307] r8169 0004:41:00.0: save config 0x1c: 0x00000000 [ 461.211327][ T6297] iwlwifi 0002:21:00.0: save config 0x04: 0x00100406 [ 461.211333][ T6307] r8169 0004:41:00.0: save config 0x20: 0xf4210004 [ 461.211350][ T6297] iwlwifi 0002:21:00.0: save config 0x08: 0x02800078 [ 461.211355][ T6307] r8169 0004:41:00.0: save config 0x24: 0x00000000 [ 461.211372][ T6297] iwlwifi 0002:21:00.0: save config 0x0c: 0x00000000 [ 461.211379][ T6307] r8169 0004:41:00.0: save config 0x28: 0x00000000 [ 461.211395][ T6297] iwlwifi 0002:21:00.0: save config 0x10: 0xf2200004 [ 461.211401][ T6307] r8169 0004:41:00.0: save config 0x2c: 0x012310ec [ 461.211417][ T6297] iwlwifi 0002:21:00.0: save config 0x14: 0x00000000 [ 461.211421][ T6307] r8169 0004:41:00.0: save config 0x30: 0x00000000 [ 461.211439][ T6297] iwlwifi 0002:21:00.0: save config 0x18: 0x00000000 [ 461.211445][ T6307] r8169 0004:41:00.0: save config 0x34: 0x00000040 [ 461.211461][ T6297] iwlwifi 0002:21:00.0: save config 0x1c: 0x00000000 [ 461.211468][ T6307] r8169 0004:41:00.0: save config 0x38: 0x00000000 [ 461.211483][ T6297] iwlwifi 0002:21:00.0: save config 0x20: 0x00000000 [ 461.211487][ T6307] r8169 0004:41:00.0: save config 0x3c: 0x00000197 [ 461.211505][ T6297] iwlwifi 0002:21:00.0: save config 0x24: 0x00000000 [ 461.211527][ T6297] iwlwifi 0002:21:00.0: save config 0x28: 0x00000000 [ 461.211550][ T6297] iwlwifi 0002:21:00.0: save config 0x2c: 0x10108086 [ 461.211574][ T6297] iwlwifi 0002:21:00.0: save config 0x30: 0x00000000 [ 461.211596][ T6297] iwlwifi 0002:21:00.0: save config 0x34: 0x000000c8 [ 461.211618][ T6297] iwlwifi 0002:21:00.0: save config 0x38: 0x00000000 [ 461.211644][ T6297] iwlwifi 0002:21:00.0: save config 0x3c: 0x00000183 [ 461.224517][ T6297] iwlwifi 0002:21:00.0: PCI PM: Suspend power state: D3hot [ 461.224566][ T6307] r8169 0004:41:00.0: PCI PM: Suspend power state: D3hot [ 461.224614][ T6299] pcieport 0004:40:00.0: save config 0x00: 0x35881d87 [ 461.224622][ T6299] pcieport 0004:40:00.0: save config 0x04: 0x00100507 [ 461.224629][ T6299] pcieport 0004:40:00.0: save config 0x08: 0x06040001 [ 461.224636][ T6299] pcieport 0004:40:00.0: save config 0x0c: 0x00010000 [ 461.224642][ T6299] pcieport 0004:40:00.0: save config 0x10: 0x00000000 [ 461.224649][ T6299] pcieport 0004:40:00.0: save config 0x14: 0x00000000 [ 461.224655][ T6299] pcieport 0004:40:00.0: save config 0x18: 0x00414140 [ 461.224661][ T6299] pcieport 0004:40:00.0: save config 0x1c: 0x00000000 [ 461.224667][ T6299] pcieport 0004:40:00.0: save config 0x20: 0xf420f420 [ 461.224673][ T6299] pcieport 0004:40:00.0: save config 0x24: 0x0001fff1 [ 461.224680][ T6299] pcieport 0004:40:00.0: save config 0x28: 0x00000000 [ 461.224686][ T6299] pcieport 0004:40:00.0: save config 0x2c: 0x00000000 [ 461.224692][ T6299] pcieport 0004:40:00.0: save config 0x30: 0x00000000 [ 461.224698][ T6299] pcieport 0004:40:00.0: save config 0x34: 0x00000040 [ 461.224705][ T6299] pcieport 0004:40:00.0: save config 0x38: 0x00000000 [ 461.224711][ T6299] pcieport 0004:40:00.0: save config 0x3c: 0x00020197 [ 461.236873][ T6299] pcieport 0004:40:00.0: PCI PM: Suspend power state: D3hot [ 461.247945][ T6291] rockchip-dw-pcie a41000000.pcie: Failed to receive PME_TO_Ack [ 461.258929][ T6291] rockchip-dw-pcie a41000000.pcie: Timeout waiting for L2 entry! LTSSM: 0x12 [ 461.258937][ T6291] rockchip-dw-pcie a41000000.pcie: PM: dpm_run_callback(): genpd_suspend_noirq returns -110 [ 461.258952][ T6291] rockchip-dw-pcie a41000000.pcie: PM: failed to suspend noirq: error -110 [ 461.276608][ T6303] iwlwifi 0002:21:00.0: restore config 0x3c: 0x00000100 -> 0x00000183 [ 461.276655][ T6302] pcieport 0004:40:00.0: restore config 0x2c: 0x00000000 -> 0x00000000 [ 461.276683][ T6302] pcieport 0004:40:00.0: restore config 0x28: 0x00000000 -> 0x00000000 [ 461.276714][ T6302] pcieport 0004:40:00.0: restore config 0x24: 0x0001fff1 -> 0x0001fff1 [ 461.276805][ T6303] iwlwifi 0002:21:00.0: restore config 0x10: 0x00000004 -> 0xf2200004 [ 461.276908][ T6303] iwlwifi 0002:21:00.0: restore config 0x04: 0x00100000 -> 0x00100406 [ 461.289977][ T6291] PM: noirq suspend of devices failed [ 461.302571][ T6298] xhci-hcd xhci-hcd.7.auto: xHC error in resume, USBSTS 0x401, Reinit [ 461.302581][ T6298] usb usb5: root hub lost power or was reset [ 461.302585][ T6298] usb usb6: root hub lost power or was reset [ 461.425101][ T6307] xhci-hcd xhci-hcd.8.auto: xHC error in resume, USBSTS 0x401, Reinit [ 461.425111][ T6307] usb usb7: root hub lost power or was reset [ 461.425115][ T6307] usb usb8: root hub lost power or was reset [ 461.746324][ T6291] OOM killer enabled. [ 461.746666][ T6291] Restarting tasks: Starting [ 461.748345][ T6291] Restarting tasks: Done [ 461.748757][ T6291] random: crng reseeded on system resumption [ 461.749533][ T6291] PM: suspend exit [ 461.809104][ T6056] Realtek Internal NBASE-T PHY r8169-4-4100:00: attached PHY driver (mii_bus:phy_addr=r8169-4-4100:00, irq=MAC) [ 461.810148][ T6056] r8169 0004:41:00.0: enabling bus mastering [ 461.989335][ T6298] r8169 0004:41:00.0 enP4p65s0: Link is Down [ 464.915207][ T6311] r8169 0004:41:00.0 enP4p65s0: Link is Up - 1Gbps/Full - flow control rx/tx [ 465.527599][ T6149] wlan0: authenticate with 78:d2:94:85:bb:b2 (local address=a4:6b:b6:06:5c:8e) [ 465.529749][ T6149] wlan0: send auth to 78:d2:94:85:bb:b2 (try 1/3) [ 465.543850][ T6298] wlan0: authenticated [ 465.545190][ T6298] wlan0: associate with 78:d2:94:85:bb:b2 (try 1/3) [ 465.555534][ T6298] wlan0: RX AssocResp from 78:d2:94:85:bb:b2 (capab=0x31 status=0 aid=1) [ 465.560431][ T6298] wlan0: associated Thanks -Anand > Changes since PATCHv3: > * https://lore.kernel.org/linux-pci/1744940759-23823-1-git-send-email-shawn.lin@rock-chips.com/ > * rename rockchip_pcie_get_ltssm to rockchip_pcie_get_ltssm_status_reg > in a separate patch (Niklas Cassel) > * rename rockchip_pcie_get_pure_ltssm to rockchip_pcie_get_ltssm_state > in a separate patch (Niklas Cassel) > * Move devm_phy_get out of phy_init to probe in a separate patch > (Manivannan Sadhasivam) > * Add helper function for enhanced LTSSM control mode in a separate patch > (Niklas Cassel) > * Add helper function for controller mode in a separate patch > (Niklas Cassel) > * Add helper function for DDL indicator in a separate patch > (Niklas Cassel) > * Move rockchip_pcie_pme_turn_off implementation in a separate patch > * Rebase to v6.18-rc3 using new FIELD_PREP_WM16() > * Improve readability of PME_TURN_OFF/PME_TO_ACK defines (Manivannan Sadhasivam) > * Fix usage of reverse Xmas (Manivannan Sadhasivam) > * Assert PERST# before turning off other resources (Manivannan Sadhasivam) > * Improve some error messages (Manivannan Sadhasivam) > * Rename goto labels as per their purpose (Manivannan Sadhasivam) > * Add extra patch for dw_pcie_resume_noirq, since I've seen errors > during resume on boards not having anything plugged into their PCIe > port > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > Sebastian Reichel (9): > PCI: dw-rockchip: Rename rockchip_pcie_get_ltssm function > PCI: dw-rockchip: Support get_ltssm operation > PCI: dw-rockchip: Move devm_phy_get out of phy_init > PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode > PCI: dw-rockchip: Add helper function for controller mode > PCI: dw-rockchip: Add helper function for DDL indicator > PCI: dw-rockchip: Add pme_turn_off support > PCI: dw-rockchip: Add system PM support > PCI: dwc: support missing PCIe device on resume > > drivers/pci/controller/dwc/pcie-designware-host.c | 13 +- > drivers/pci/controller/dwc/pcie-dw-rockchip.c | 220 ++++++++++++++++++---- > 2 files changed, 198 insertions(+), 35 deletions(-) > --- > base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa > change-id: 20251028-rockchip-pcie-system-suspend-86cf08a7b229 > > Best regards, > -- > Sebastian Reichel <sebastian.reichel@collabora.com> > >
On Wed, Oct 29, 2025 at 06:56:39PM +0100, Sebastian Reichel wrote: > I've recently been working on fixing up at least basic system suspend > support on the Rockchip RK3576 platform. Currently the biggest open > issue is missing support in the PCIe driver. This series is a follow-up > for Shawn Lin's series with feedback from Niklas Cassel and Manivannan > Sadhasivam being handled as well as some of my own changes fixing up > things I noticed. > > In opposite to Shawn Lin I did not test with different peripherals as my > main goal is getting basic suspend to ram working in the first place. Wouldn't it break users who have connected endpoint devices and suspend their platform? I don't want to have an untested feature that could potentially cause regressions, just for the sake of getting basic system PM. But if your goal is to just add basic system PM operations for CI testing, then I would suggest you to do something minimal in the suspend/resume path that don't disrupt the operation of a device. But this also should be tested with some devices for sanity. - Mani > I > did notice issues with the Broadcom WLAN card on the RK3576 EVB. > Suspending that platform without a driver being probed works, but after > probing brcmfmac suspend is aborted because brcmf_pcie_pm_enter_D3() > does not work. As far as I can tell the problem is unrelated to the > Rockchip PCIe driver. > > Changes since PATCHv3: > * https://lore.kernel.org/linux-pci/1744940759-23823-1-git-send-email-shawn.lin@rock-chips.com/ > * rename rockchip_pcie_get_ltssm to rockchip_pcie_get_ltssm_status_reg > in a separate patch (Niklas Cassel) > * rename rockchip_pcie_get_pure_ltssm to rockchip_pcie_get_ltssm_state > in a separate patch (Niklas Cassel) > * Move devm_phy_get out of phy_init to probe in a separate patch > (Manivannan Sadhasivam) > * Add helper function for enhanced LTSSM control mode in a separate patch > (Niklas Cassel) > * Add helper function for controller mode in a separate patch > (Niklas Cassel) > * Add helper function for DDL indicator in a separate patch > (Niklas Cassel) > * Move rockchip_pcie_pme_turn_off implementation in a separate patch > * Rebase to v6.18-rc3 using new FIELD_PREP_WM16() > * Improve readability of PME_TURN_OFF/PME_TO_ACK defines (Manivannan Sadhasivam) > * Fix usage of reverse Xmas (Manivannan Sadhasivam) > * Assert PERST# before turning off other resources (Manivannan Sadhasivam) > * Improve some error messages (Manivannan Sadhasivam) > * Rename goto labels as per their purpose (Manivannan Sadhasivam) > * Add extra patch for dw_pcie_resume_noirq, since I've seen errors > during resume on boards not having anything plugged into their PCIe > port > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- > Sebastian Reichel (9): > PCI: dw-rockchip: Rename rockchip_pcie_get_ltssm function > PCI: dw-rockchip: Support get_ltssm operation > PCI: dw-rockchip: Move devm_phy_get out of phy_init > PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode > PCI: dw-rockchip: Add helper function for controller mode > PCI: dw-rockchip: Add helper function for DDL indicator > PCI: dw-rockchip: Add pme_turn_off support > PCI: dw-rockchip: Add system PM support > PCI: dwc: support missing PCIe device on resume > > drivers/pci/controller/dwc/pcie-designware-host.c | 13 +- > drivers/pci/controller/dwc/pcie-dw-rockchip.c | 220 ++++++++++++++++++---- > 2 files changed, 198 insertions(+), 35 deletions(-) > --- > base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa > change-id: 20251028-rockchip-pcie-system-suspend-86cf08a7b229 > > Best regards, > -- > Sebastian Reichel <sebastian.reichel@collabora.com> > -- மணிவண்ணன் சதாசிவம்
Hi, On Sat, Nov 01, 2025 at 07:29:41PM +0530, Manivannan Sadhasivam wrote: > On Wed, Oct 29, 2025 at 06:56:39PM +0100, Sebastian Reichel wrote: > > I've recently been working on fixing up at least basic system suspend > > support on the Rockchip RK3576 platform. Currently the biggest open > > issue is missing support in the PCIe driver. This series is a follow-up > > for Shawn Lin's series with feedback from Niklas Cassel and Manivannan > > Sadhasivam being handled as well as some of my own changes fixing up > > things I noticed. > > > > In opposite to Shawn Lin I did not test with different peripherals as my > > main goal is getting basic suspend to ram working in the first place. > > Wouldn't it break users who have connected endpoint devices and suspend their > platform? I don't want to have an untested feature that could potentially cause > regressions, just for the sake of getting basic system PM. > > But if your goal is to just add basic system PM operations for CI > testing, then I would suggest you to do something minimal in the > suspend/resume path that don't disrupt the operation of a device. > > But this also should be tested with some devices for sanity. My goal is proper system PM support, but I would like to go step by step. Right now system suspend on the Rockchip RK3576 EVB just hangs the board and it has to be power cycled afterwards. In parallel to this series I've send a bunch of fixes to get it working. It surely isn't perfect, but I fear things regressing again in other areas while the complex PCIe system sleep is being worked on - simply blocking system suspend is not very helpful, since it effectively hides suspend problems. Greetings, -- Sebastian > - Mani > > > I did notice issues with the Broadcom WLAN card on the RK3576 EVB. > > Suspending that platform without a driver being probed works, but after > > probing brcmfmac suspend is aborted because brcmf_pcie_pm_enter_D3() > > does not work. As far as I can tell the problem is unrelated to the > > Rockchip PCIe driver. > > > > Changes since PATCHv3: > > * https://lore.kernel.org/linux-pci/1744940759-23823-1-git-send-email-shawn.lin@rock-chips.com/ > > * rename rockchip_pcie_get_ltssm to rockchip_pcie_get_ltssm_status_reg > > in a separate patch (Niklas Cassel) > > * rename rockchip_pcie_get_pure_ltssm to rockchip_pcie_get_ltssm_state > > in a separate patch (Niklas Cassel) > > * Move devm_phy_get out of phy_init to probe in a separate patch > > (Manivannan Sadhasivam) > > * Add helper function for enhanced LTSSM control mode in a separate patch > > (Niklas Cassel) > > * Add helper function for controller mode in a separate patch > > (Niklas Cassel) > > * Add helper function for DDL indicator in a separate patch > > (Niklas Cassel) > > * Move rockchip_pcie_pme_turn_off implementation in a separate patch > > * Rebase to v6.18-rc3 using new FIELD_PREP_WM16() > > * Improve readability of PME_TURN_OFF/PME_TO_ACK defines (Manivannan Sadhasivam) > > * Fix usage of reverse Xmas (Manivannan Sadhasivam) > > * Assert PERST# before turning off other resources (Manivannan Sadhasivam) > > * Improve some error messages (Manivannan Sadhasivam) > > * Rename goto labels as per their purpose (Manivannan Sadhasivam) > > * Add extra patch for dw_pcie_resume_noirq, since I've seen errors > > during resume on boards not having anything plugged into their PCIe > > port > > > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > > --- > > Sebastian Reichel (9): > > PCI: dw-rockchip: Rename rockchip_pcie_get_ltssm function > > PCI: dw-rockchip: Support get_ltssm operation > > PCI: dw-rockchip: Move devm_phy_get out of phy_init > > PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode > > PCI: dw-rockchip: Add helper function for controller mode > > PCI: dw-rockchip: Add helper function for DDL indicator > > PCI: dw-rockchip: Add pme_turn_off support > > PCI: dw-rockchip: Add system PM support > > PCI: dwc: support missing PCIe device on resume > > > > drivers/pci/controller/dwc/pcie-designware-host.c | 13 +- > > drivers/pci/controller/dwc/pcie-dw-rockchip.c | 220 ++++++++++++++++++---- > > 2 files changed, 198 insertions(+), 35 deletions(-) > > --- > > base-commit: dcb6fa37fd7bc9c3d2b066329b0d27dedf8becaa > > change-id: 20251028-rockchip-pcie-system-suspend-86cf08a7b229 > > > > Best regards, > > -- > > Sebastian Reichel <sebastian.reichel@collabora.com> > > > > -- > மணிவண்ணன் சதாசிவம்
Hi Sebastian, On Tue, 4 Nov 2025 at 00:29, Sebastian Reichel <sebastian.reichel@collabora.com> wrote: > > Hi, > > On Sat, Nov 01, 2025 at 07:29:41PM +0530, Manivannan Sadhasivam wrote: > > On Wed, Oct 29, 2025 at 06:56:39PM +0100, Sebastian Reichel wrote: > > > I've recently been working on fixing up at least basic system suspend > > > support on the Rockchip RK3576 platform. Currently the biggest open > > > issue is missing support in the PCIe driver. This series is a follow-up > > > for Shawn Lin's series with feedback from Niklas Cassel and Manivannan > > > Sadhasivam being handled as well as some of my own changes fixing up > > > things I noticed. > > > > > > In opposite to Shawn Lin I did not test with different peripherals as my > > > main goal is getting basic suspend to ram working in the first place. > > > > Wouldn't it break users who have connected endpoint devices and suspend their > > platform? I don't want to have an untested feature that could potentially cause > > regressions, just for the sake of getting basic system PM. > > > > But if your goal is to just add basic system PM operations for CI > > testing, then I would suggest you to do something minimal in the > > suspend/resume path that don't disrupt the operation of a device. > > > > But this also should be tested with some devices for sanity. > > My goal is proper system PM support, but I would like to go step by > step. Right now system suspend on the Rockchip RK3576 EVB just hangs > the board and it has to be power cycled afterwards. In parallel to > this series I've send a bunch of fixes to get it working. It surely > isn't perfect, but I fear things regressing again in other areas while > the complex PCIe system sleep is being worked on - simply blocking system > suspend is not very helpful, since it effectively hides suspend problems. > As per my understanding, the current DTS configuration is missing definitions for critical PCIe power management GPIOs (clkreq-gpios, perst-gpios, wake-gpios) clkreq-gpios, such as PCIE30x1_0_CLKREQn_M1_L (not sure if it is used ?) perst-gpios such as PCIE30x1_0_PERSTn_M1_L wake-gpios, such as PCIE30x1_0_WAKEn_M1_L. However, the RK3588 TRM indicates that these power management functions can be controlled programmatically using specific memory-mapped registers: The PCIE_CLIENT_POWER_CON register at 0x002C provides comprehensive power management controls, including link-state management, wake-up event handling, and clock management. In PHY GRF, we have the PCIe3PHY_GRF_PHY0_LN0_CON0 register at 0x1000 allows direct control over the PHY's power state (P-states like P1, P2), enabling transitions into deep suspend (L2/L3) via register writes clkreq_n Clock request for lane X. This is a side-band signal that a PIPE 4.2 controller needs to enter and exit P1.CPM, P1.1, and P1.2 power states. My thought is that using rockchip_pcie_phy_deinit() in the suspend routine and rockchip_pcie_phy_init() in the resume routine are incorrect; these functions likely perform full resets or power cuts rather than managed power state transitions, thus disrupting the desired suspended state of the PCIe link I tried a few things on my own, but I am not moving forward. Thanks -Anand
Hi All,
On Fri, 7 Nov 2025 at 00:31, Anand Moon <linux.amoon@gmail.com> wrote:
>
> Hi Sebastian,
>
> On Tue, 4 Nov 2025 at 00:29, Sebastian Reichel
> <sebastian.reichel@collabora.com> wrote:
> >
> > Hi,
> >
> > On Sat, Nov 01, 2025 at 07:29:41PM +0530, Manivannan Sadhasivam wrote:
> > > On Wed, Oct 29, 2025 at 06:56:39PM +0100, Sebastian Reichel wrote:
> > > > I've recently been working on fixing up at least basic system suspend
> > > > support on the Rockchip RK3576 platform. Currently the biggest open
> > > > issue is missing support in the PCIe driver. This series is a follow-up
> > > > for Shawn Lin's series with feedback from Niklas Cassel and Manivannan
> > > > Sadhasivam being handled as well as some of my own changes fixing up
> > > > things I noticed.
> > > >
> > > > In opposite to Shawn Lin I did not test with different peripherals as my
> > > > main goal is getting basic suspend to ram working in the first place.
> > >
> > > Wouldn't it break users who have connected endpoint devices and suspend their
> > > platform? I don't want to have an untested feature that could potentially cause
> > > regressions, just for the sake of getting basic system PM.
> > >
> > > But if your goal is to just add basic system PM operations for CI
> > > testing, then I would suggest you to do something minimal in the
> > > suspend/resume path that don't disrupt the operation of a device.
> > >
> > > But this also should be tested with some devices for sanity.
> >
> > My goal is proper system PM support, but I would like to go step by
> > step. Right now system suspend on the Rockchip RK3576 EVB just hangs
> > the board and it has to be power cycled afterwards. In parallel to
> > this series I've send a bunch of fixes to get it working. It surely
> > isn't perfect, but I fear things regressing again in other areas while
> > the complex PCIe system sleep is being worked on - simply blocking system
> > suspend is not very helpful, since it effectively hides suspend problems.
> >
> As per my understanding, the current DTS configuration is missing definitions
> for critical PCIe power management GPIOs (clkreq-gpios, perst-gpios, wake-gpios)
>
> clkreq-gpios, such as PCIE30x1_0_CLKREQn_M1_L (not sure if it is used ?)
> perst-gpios such as PCIE30x1_0_PERSTn_M1_L
> wake-gpios, such as PCIE30x1_0_WAKEn_M1_L.
>
As per the TRM 11.5 Interface Description
Signal Name Direction IO Attribute Description
------------ --------- -----------------------
------------------------------------------------------------
BUTTON_RSTN I Pull-down External
reset button input; pulled low to initiate reset
WAKEN I/O Open-drain, pull-up Wake
signal; enables device or host to signal wake events
PERSTN I/O Pull-down PCIe
reset signal; asserted low to reset endpoint or root complex
CLKREQN I/O Open-drain, pull-up Clock
request signal; used for dynamic clock management
See the following commit 4294e3211178 ("arm64: dts: rockchip: Split up
RK3588's PCIe pinctrls")
These pinctrls manage the low-speed PCIe signals:
- CLKREQ#: An output on the RK3588 (both RC or EP modes), used to
request that external clock-generation circuitry provide a clock.
- PERST#: An input on the RK3588 in EP mode, used to detect a reset
signal from the RC. In RC mode, the hardware does not use this signal:
Linux itself generates it by putting the pin in GPIO mode.
- WAKE#: In EP mode, this is an output; in RC mode, this is an input.
Each of these signals serves a distinct purpose, and more importantly,
PERST# should not be muxed when the RK3588 is in the RC role. Bundling
them together in pinctrl groups prevents proper use: indeed, almost none
of the current board-specific .dts files make any use of them.
(Exception: Rock 5A recently had a patch land that misuses _pins; this
patch corrects that.)
However, on some RK3588 boards, the PCIe 3 controller will indefinitely
stall the boot if CLKREQ# is not muxed (details in the next patch).
This patch unbundles the signals to allow them to be used.
So we can use these pinctrl to perform different tasks
like PERST# to reset and WAKE# to wake the PCIE in suspend / resume state.
Is this a good way to split the rk368 PCIe pinctrl into separate components?
Here is the example user wake gpio.
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
index 19a08f7794e6..13a7aa3ec1fc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -359,9 +359,10 @@ rgmii_phy1: ethernet-phy@1 {
};
&pcie2x1l2 {
- pinctrl-0 = <&pcie2_reset>, <&pcie20x1m0_clkreqn>, <&pcie20x1m0_waken>;
+ pinctrl-0 = <&pcie2_reset>, <&pcie20x1m0_clkreqn>, <&pcie2wakeup>;
pinctrl-names = "default";
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ wakeup-gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_wf>;
status = "okay";
};
I haven’t come across a working example for this in RC mode.
Is there any confirmation that this approach functions as expected?
> However, the RK3588 TRM indicates that these power management functions
> can be controlled programmatically using specific memory-mapped registers:
>
> The PCIE_CLIENT_POWER_CON register at 0x002C provides comprehensive
> power management controls, including link-state management, wake-up
> event handling,
> and clock management.
>
> In PHY GRF, we have the PCIe3PHY_GRF_PHY0_LN0_CON0 register at 0x1000 allows
> direct control over the PHY's power state (P-states like P1, P2),
> enabling transitions into
> deep suspend (L2/L3) via register writes
> clkreq_n Clock request for lane X. This is a side-band signal that a
> PIPE 4.2 controller needs
> to enter and exit P1.CPM, P1.1, and P1.2 power states.
>
> My thought is that using rockchip_pcie_phy_deinit() in the suspend
> routine and rockchip_pcie_phy_init() in the resume routine are
> incorrect; these functions
> likely perform full resets or power cuts rather than managed power
> state transitions,
> thus disrupting the desired suspended state of the PCIe link
>
> I tried a few things on my own, but I am not moving forward.
>
Thanks
-Anand
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