Add a device tree binding for the Toshiba TC9563 PCIe switch, which
provides an Ethernet MAC integrated to the 3rd downstream port and
two downstream PCIe ports.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
---
.../devicetree/bindings/pci/toshiba,tc9563.yaml | 178 +++++++++++++++++++++
1 file changed, 178 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..82c902b67852d6c4b0305764a2231fe04e83458d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
@@ -0,0 +1,178 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba TC9563 PCIe switch
+
+maintainers:
+ - Krishna chaitanya chundru <quic_krichai@quicinc.com>
+
+description: |
+ Toshiba TC9563 PCIe switch has one upstream and three downstream ports.
+ The 3rd downstream port has integrated endpoint device of Ethernet MAC.
+ Other two downstream ports are supposed to connect to external device.
+
+ The TC9563 PCIe switch can be configured through I2C interface before
+ PCIe link is established to change FTS, ASPM related entry delays,
+ tx amplitude etc for better power efficiency and functionality.
+
+properties:
+ compatible:
+ enum:
+ - pci1179,0623
+
+ reg:
+ maxItems: 1
+
+ reset-gpios:
+ maxItems: 1
+ description:
+ GPIO controlling the RESX# pin.
+
+ vdd18-supply: true
+
+ vdd09-supply: true
+
+ vddc-supply: true
+
+ vddio1-supply: true
+
+ vddio2-supply: true
+
+ vddio18-supply: true
+
+ i2c-parent:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description:
+ A phandle to the parent I2C node and the slave address of the device
+ used to do configure tc9563 to change FTS, tx amplitude etc.
+ items:
+ - description: Phandle to the I2C controller node
+ - description: I2C slave address
+
+patternProperties:
+ "^pcie@[1-3],0$":
+ description:
+ child nodes describing the internal downstream ports
+ the tc9563 switch.
+ type: object
+ allOf:
+ - $ref: "#/$defs/tc9563-node"
+ - $ref: /schemas/pci/pci-pci-bridge.yaml#
+ unevaluatedProperties: false
+
+$defs:
+ tc9563-node:
+ type: object
+
+ properties:
+ toshiba,tx-amplitude-microvolt:
+ description:
+ Change Tx Margin setting for low power consumption.
+
+ toshiba,no-dfe-support:
+ type: boolean
+ description:
+ Disable DFE (Decision Feedback Equalizer), which mitigates
+ intersymbol interference and some reflections caused by impedance mismatches.
+
+required:
+ - reset-gpios
+ - vdd18-supply
+ - vdd09-supply
+ - vddc-supply
+ - vddio1-supply
+ - vddio2-supply
+ - vddio18-supply
+ - i2c-parent
+
+allOf:
+ - $ref: "#/$defs/tc9563-node"
+ - $ref: /schemas/pci/pci-bus-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pcie@0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ bus-range = <0x01 0xff>;
+
+ pcie@0,0 {
+ compatible = "pci1179,0623";
+
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ bus-range = <0x02 0xff>;
+
+ i2c-parent = <&qup_i2c 0x77>;
+
+ vdd18-supply = <&vdd>;
+ vdd09-supply = <&vdd>;
+ vddc-supply = <&vdd>;
+ vddio1-supply = <&vdd>;
+ vddio2-supply = <&vdd>;
+ vddio18-supply = <&vdd>;
+
+ reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+
+ pcie@1,0 {
+ compatible = "pciclass,0604";
+ reg = <0x20800 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x03 0xff>;
+
+ toshiba,no-dfe-support;
+ };
+
+ pcie@2,0 {
+ compatible = "pciclass,0604";
+ reg = <0x21000 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x04 0xff>;
+ };
+
+ pcie@3,0 {
+ compatible = "pciclass,0604";
+ reg = <0x21800 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x05 0xff>;
+
+ toshiba,tx-amplitude-microvolt = <10>;
+
+ ethernet@0,0 {
+ reg = <0x50000 0x0 0x0 0x0 0x0>;
+ };
+
+ ethernet@0,1 {
+ reg = <0x50100 0x0 0x0 0x0 0x0>;
+ };
+ };
+ };
+ };
+ };
--
2.34.1On Wed, Oct 29, 2025 at 04:59:54PM +0530, Krishna Chaitanya Chundru wrote:
> Add a device tree binding for the Toshiba TC9563 PCIe switch, which
> provides an Ethernet MAC integrated to the 3rd downstream port and
> two downstream PCIe ports.
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> ---
> .../devicetree/bindings/pci/toshiba,tc9563.yaml | 178 +++++++++++++++++++++
> 1 file changed, 178 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..82c902b67852d6c4b0305764a2231fe04e83458d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml
> @@ -0,0 +1,178 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/toshiba,tc9563.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Toshiba TC9563 PCIe switch
> +
> +maintainers:
> + - Krishna chaitanya chundru <quic_krichai@quicinc.com>
> +
> +description: |
> + Toshiba TC9563 PCIe switch has one upstream and three downstream ports.
> + The 3rd downstream port has integrated endpoint device of Ethernet MAC.
> + Other two downstream ports are supposed to connect to external device.
> +
> + The TC9563 PCIe switch can be configured through I2C interface before
> + PCIe link is established to change FTS, ASPM related entry delays,
> + tx amplitude etc for better power efficiency and functionality.
> +
> +properties:
> + compatible:
> + enum:
> + - pci1179,0623
> +
> + reg:
> + maxItems: 1
> +
> + reset-gpios:
> + maxItems: 1
> + description:
> + GPIO controlling the RESX# pin.
PCI binding already defines PERST# as 'reset-gpios'. Since this pin is called
RESX in the device reference manual, it'd be better to rename it to
'resx-gpios'.
With this,
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
- Mani
> +
> + vdd18-supply: true
> +
> + vdd09-supply: true
> +
> + vddc-supply: true
> +
> + vddio1-supply: true
> +
> + vddio2-supply: true
> +
> + vddio18-supply: true
> +
> + i2c-parent:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + description:
> + A phandle to the parent I2C node and the slave address of the device
> + used to do configure tc9563 to change FTS, tx amplitude etc.
> + items:
> + - description: Phandle to the I2C controller node
> + - description: I2C slave address
> +
> +patternProperties:
> + "^pcie@[1-3],0$":
> + description:
> + child nodes describing the internal downstream ports
> + the tc9563 switch.
> + type: object
> + allOf:
> + - $ref: "#/$defs/tc9563-node"
> + - $ref: /schemas/pci/pci-pci-bridge.yaml#
> + unevaluatedProperties: false
> +
> +$defs:
> + tc9563-node:
> + type: object
> +
> + properties:
> + toshiba,tx-amplitude-microvolt:
> + description:
> + Change Tx Margin setting for low power consumption.
> +
> + toshiba,no-dfe-support:
> + type: boolean
> + description:
> + Disable DFE (Decision Feedback Equalizer), which mitigates
> + intersymbol interference and some reflections caused by impedance mismatches.
> +
> +required:
> + - reset-gpios
> + - vdd18-supply
> + - vdd09-supply
> + - vddc-supply
> + - vddio1-supply
> + - vddio2-supply
> + - vddio18-supply
> + - i2c-parent
> +
> +allOf:
> + - $ref: "#/$defs/tc9563-node"
> + - $ref: /schemas/pci/pci-bus-common.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + pcie {
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + pcie@0 {
> + device_type = "pci";
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> +
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + bus-range = <0x01 0xff>;
> +
> + pcie@0,0 {
> + compatible = "pci1179,0623";
> +
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> + device_type = "pci";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + bus-range = <0x02 0xff>;
> +
> + i2c-parent = <&qup_i2c 0x77>;
> +
> + vdd18-supply = <&vdd>;
> + vdd09-supply = <&vdd>;
> + vddc-supply = <&vdd>;
> + vddio1-supply = <&vdd>;
> + vddio2-supply = <&vdd>;
> + vddio18-supply = <&vdd>;
> +
> + reset-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
> +
> + pcie@1,0 {
> + compatible = "pciclass,0604";
> + reg = <0x20800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x03 0xff>;
> +
> + toshiba,no-dfe-support;
> + };
> +
> + pcie@2,0 {
> + compatible = "pciclass,0604";
> + reg = <0x21000 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x04 0xff>;
> + };
> +
> + pcie@3,0 {
> + compatible = "pciclass,0604";
> + reg = <0x21800 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + device_type = "pci";
> + ranges;
> + bus-range = <0x05 0xff>;
> +
> + toshiba,tx-amplitude-microvolt = <10>;
> +
> + ethernet@0,0 {
> + reg = <0x50000 0x0 0x0 0x0 0x0>;
> + };
> +
> + ethernet@0,1 {
> + reg = <0x50100 0x0 0x0 0x0 0x0>;
> + };
> + };
> + };
> + };
> + };
>
> --
> 2.34.1
>
--
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