From: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Add binding and physical client ids for the Glymur platform. Physical
client IDs instead of virtual client IDs are used for qcom new platforms
in the Inter Process Communication Controller (IPCC) driver as virtual to
physical mapping logic is removed in HW.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
.../devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 +
include/dt-bindings/mailbox/qcom,glymur-ipcc.h | 68 ++++++++++++++++++++++
2 files changed, 69 insertions(+)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index ee3fe093e3ca..7c4d6170491d 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -24,6 +24,7 @@ properties:
compatible:
items:
- enum:
+ - qcom,glymur-ipcc
- qcom,kaanapali-ipcc
- qcom,milos-ipcc
- qcom,qcs8300-ipcc
diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
new file mode 100644
index 000000000000..3ab8189974a5
--- /dev/null
+++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
+#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H
+
+/* Glymur physical client IDs */
+#define IPCC_MPROC_AOP 0
+#define IPCC_MPROC_TZ 1
+#define IPCC_MPROC_MPSS 2
+#define IPCC_MPROC_LPASS 3
+#define IPCC_MPROC_SLPI 4
+#define IPCC_MPROC_SDC 5
+#define IPCC_MPROC_CDSP 6
+#define IPCC_MPROC_NPU 7
+#define IPCC_MPROC_APSS 8
+#define IPCC_MPROC_GPU 9
+#define IPCC_MPROC_ICP 11
+#define IPCC_MPROC_VPU 12
+#define IPCC_MPROC_PCIE0 13
+#define IPCC_MPROC_PCIE1 14
+#define IPCC_MPROC_PCIE2 15
+#define IPCC_MPROC_SPSS 16
+#define IPCC_MPROC_PCIE3 19
+#define IPCC_MPROC_PCIE4 20
+#define IPCC_MPROC_PCIE5 21
+#define IPCC_MPROC_PCIE6 22
+#define IPCC_MPROC_TME 23
+#define IPCC_MPROC_WPSS 24
+#define IPCC_MPROC_PCIE7 44
+#define IPCC_MPROC_SOCCP 46
+
+#define IPCC_COMPUTE_L0_LPASS 0
+#define IPCC_COMPUTE_L0_CDSP 1
+#define IPCC_COMPUTE_L0_APSS 2
+#define IPCC_COMPUTE_L0_GPU 3
+#define IPCC_COMPUTE_L0_CVP 6
+#define IPCC_COMPUTE_L0_ICP 7
+#define IPCC_COMPUTE_L0_VPU 8
+#define IPCC_COMPUTE_L0_DPU 9
+#define IPCC_COMPUTE_L0_SOCCP 11
+
+#define IPCC_COMPUTE_L1_LPASS 0
+#define IPCC_COMPUTE_L1_CDSP 1
+#define IPCC_COMPUTE_L1_APSS 2
+#define IPCC_COMPUTE_L1_GPU 3
+#define IPCC_COMPUTE_L1_CVP 6
+#define IPCC_COMPUTE_L1_ICP 7
+#define IPCC_COMPUTE_L1_VPU 8
+#define IPCC_COMPUTE_L1_DPU 9
+#define IPCC_COMPUTE_L1_SOCCP 11
+
+#define IPCC_PERIPH_LPASS 0
+#define IPCC_PERIPH_APSS 1
+#define IPCC_PERIPH_PCIE0 2
+#define IPCC_PERIPH_PCIE1 3
+#define IPCC_PERIPH_PCIE2 6
+#define IPCC_PERIPH_PCIE3 7
+#define IPCC_PERIPH_PCIE4 8
+#define IPCC_PERIPH_PCIE5 9
+#define IPCC_PERIPH_PCIE6 10
+#define IPCC_PERIPH_PCIE7 11
+#define IPCC_PERIPH_SOCCP 13
+#define IPCC_PERIPH_WPSS 16
+
+#endif
--
2.25.1On 29/10/2025 09:15, Jingyi Wang wrote: > diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > new file mode 100644 > index 000000000000..3ab8189974a5 > --- /dev/null > +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > @@ -0,0 +1,68 @@ > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > + > +/* Glymur physical client IDs */ > +#define IPCC_MPROC_AOP 0 Here the same - not used by Linux. Don't add these, they are really not necessary and they are not helping anyhow. For longer explanation see 2 year thread for PMIC ADC v7. Or provide explanation in terms what Linux interface you are binding here (please focus on Linux or other SW). Best regards, Krzysztof
On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote: > On 29/10/2025 09:15, Jingyi Wang wrote: > > diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > > new file mode 100644 > > index 000000000000..3ab8189974a5 > > --- /dev/null > > +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > > @@ -0,0 +1,68 @@ > > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > > +/* > > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > > + */ > > + > > +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > > +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > > + > > +/* Glymur physical client IDs */ > > +#define IPCC_MPROC_AOP 0 > > > Here the same - not used by Linux. How is this different from e.g.: include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0 Perhaps I'm misunderstanding what you're saying here. > Don't add these, they are really not > necessary and they are not helping anyhow. For longer explanation see 2 > year thread for PMIC ADC v7. > I'm sorry, I'm not able to wrangle a lore query for this, can you please provide a link? > Or provide explanation in terms what Linux interface you are binding > here (please focus on Linux or other SW). > Don't we use include/dt-bindings to define hardware constants for use in dt source as well? Has this changed? Regards, Bjorn > Best regards, > Krzysztof >
On 29/10/2025 18:23, Bjorn Andersson wrote: > On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote: >> On 29/10/2025 09:15, Jingyi Wang wrote: >>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h >>> new file mode 100644 >>> index 000000000000..3ab8189974a5 >>> --- /dev/null >>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h >>> @@ -0,0 +1,68 @@ >>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ >>> +/* >>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >>> + */ >>> + >>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H >>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H >>> + >>> +/* Glymur physical client IDs */ >>> +#define IPCC_MPROC_AOP 0 >> >> >> Here the same - not used by Linux. > > How is this different from e.g.: > > include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0 $ git grep GIC_SPI drivers/irqchip/irq-mchp-eic.c How is this not used by Linux? What is drivers/irqchip/foo.c if not a Linux driver? > > Perhaps I'm misunderstanding what you're saying here. > >> Don't add these, they are really not >> necessary and they are not helping anyhow. For longer explanation see 2 >> year thread for PMIC ADC v7. >> > > I'm sorry, I'm not able to wrangle a lore query for this, can you please > provide a link? "adc v7 qcom" and then my last two or three replies in that thread: https://lore.kernel.org/all/d7627a5d-893a-4bc3-8b67-c151ee0bea32@kernel.org/ > >> Or provide explanation in terms what Linux interface you are binding >> here (please focus on Linux or other SW). >> > > Don't we use include/dt-bindings to define hardware constants for use in No, we do not. > dt source as well? Has this changed? Yes, 5 years ago or more when we noticed people do it unnecessarily. You know, it is difficult to notice it, because we look at bindings and they seem fine. Finding that something is not used requires more effort which we usually do not care. I have few bookmarks but not necessarily the earliest, just something I managed to find because people ask the same: 2014 (so more than 5 years ago!): https://lore.kernel.org/all/201401111415.29395.arnd@arndb.de/ A bit newer: https://lore.kernel.org/linux-devicetree/CAK8P3a0fDJQvGLEtG0fxLkG08Fh9V7LEMPsx4AaS+2Ldo_xWxw@mail.gmail.com/ https://lore.kernel.org/linux-devicetree/CAK8P3a1APzs74YTcZ=m43G3zrmwJZKcYSTvV5eDDQX-37UY7Tw@mail.gmail.com/ https://lore.kernel.org/linux-devicetree/418c5f0c-5279-41f5-3705-345ec9a97ea2@linaro.org/ https://lore.kernel.org/linux-devicetree/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ https://lore.kernel.org/linux-devicetree/579a1569-7bba-491f-ba5e-7cfcb34ccc1f@linaro.org/ Best regards, Krzysztof
On Thu, Oct 30, 2025 at 06:53:59AM +0100, Krzysztof Kozlowski wrote: > On 29/10/2025 18:23, Bjorn Andersson wrote: > > On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote: > >> On 29/10/2025 09:15, Jingyi Wang wrote: > >>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > >>> new file mode 100644 > >>> index 000000000000..3ab8189974a5 > >>> --- /dev/null > >>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > >>> @@ -0,0 +1,68 @@ > >>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > >>> +/* > >>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > >>> + */ > >>> + > >>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > >>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > >>> + > >>> +/* Glymur physical client IDs */ > >>> +#define IPCC_MPROC_AOP 0 > >> > >> > >> Here the same - not used by Linux. > > > > How is this different from e.g.: > > > > include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0 > > $ git grep GIC_SPI > drivers/irqchip/irq-mchp-eic.c > My interpretation of that snippet (and the other use cases) is that they are programmatically constructing the values of a DT property, not that they define the SW API. > How is this not used by Linux? What is drivers/irqchip/foo.c if not a > Linux driver? > No argument there. [..] > > > >> Or provide explanation in terms what Linux interface you are binding > >> here (please focus on Linux or other SW). > >> > > > > Don't we use include/dt-bindings to define hardware constants for use in > > No, we do not. > I have completely missed this. Perhaps this is the first use case, but the result is non-the-less: $ find arch/*/boot/dts/qcom -name '*.h' | wc -l 0 But this makes sense, and I like it. @Jingyi, as these header constants are consumed only by DeviceTree source, please move them to arch/arm64/boot/dts/qcom/ Thanks, Bjorn
On 10/31/2025 3:11 AM, Bjorn Andersson wrote: > On Thu, Oct 30, 2025 at 06:53:59AM +0100, Krzysztof Kozlowski wrote: >> On 29/10/2025 18:23, Bjorn Andersson wrote: >>> On Wed, Oct 29, 2025 at 04:49:30PM +0100, Krzysztof Kozlowski wrote: >>>> On 29/10/2025 09:15, Jingyi Wang wrote: >>>>> diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h >>>>> new file mode 100644 >>>>> index 000000000000..3ab8189974a5 >>>>> --- /dev/null >>>>> +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h >>>>> @@ -0,0 +1,68 @@ >>>>> +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ >>>>> +/* >>>>> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >>>>> + */ >>>>> + >>>>> +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H >>>>> +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H >>>>> + >>>>> +/* Glymur physical client IDs */ >>>>> +#define IPCC_MPROC_AOP 0 >>>> >>>> >>>> Here the same - not used by Linux. >>> >>> How is this different from e.g.: >>> >>> include/dt-bindings/interrupt-controller/arm-gic.h:#define GIC_SPI 0 >> >> $ git grep GIC_SPI >> drivers/irqchip/irq-mchp-eic.c >> > > My interpretation of that snippet (and the other use cases) is that they > are programmatically constructing the values of a DT property, not that > they define the SW API. > >> How is this not used by Linux? What is drivers/irqchip/foo.c if not a >> Linux driver? >> > > No argument there. > > [..] >>> >>>> Or provide explanation in terms what Linux interface you are binding >>>> here (please focus on Linux or other SW). >>>> >>> >>> Don't we use include/dt-bindings to define hardware constants for use in >> >> No, we do not. >> > > I have completely missed this. Perhaps this is the first use case, but > the result is non-the-less: > > $ find arch/*/boot/dts/qcom -name '*.h' | wc -l > 0 > > > But this makes sense, and I like it. > > @Jingyi, as these header constants are consumed only by DeviceTree > source, please move them to arch/arm64/boot/dts/qcom/ > > Thanks, > Bjorn Well noted. Thanks, Jingyi
On Wed, Oct 29, 2025 at 01:15:10AM -0700, Jingyi Wang wrote: > From: Sibi Sankar <sibi.sankar@oss.qualcomm.com> > > Add binding and physical client ids for the Glymur platform. Physical > client IDs instead of virtual client IDs are used for qcom new platforms > in the Inter Process Communication Controller (IPCC) driver as virtual to > physical mapping logic is removed in HW. This is just copy-paste from patch 1, with the same shortcomings. Please improve the commit message in patch 1 to introduce the understanding of why we need soc-specific header files from now on, and then omit that part of the explanation from this one. Regards, Bjorn > > Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> > Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> > --- > .../devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 + > include/dt-bindings/mailbox/qcom,glymur-ipcc.h | 68 ++++++++++++++++++++++ > 2 files changed, 69 insertions(+) > > diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml > index ee3fe093e3ca..7c4d6170491d 100644 > --- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml > +++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml > @@ -24,6 +24,7 @@ properties: > compatible: > items: > - enum: > + - qcom,glymur-ipcc > - qcom,kaanapali-ipcc > - qcom,milos-ipcc > - qcom,qcs8300-ipcc > diff --git a/include/dt-bindings/mailbox/qcom,glymur-ipcc.h b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > new file mode 100644 > index 000000000000..3ab8189974a5 > --- /dev/null > +++ b/include/dt-bindings/mailbox/qcom,glymur-ipcc.h > @@ -0,0 +1,68 @@ > +/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ > +/* > + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > + */ > + > +#ifndef __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > +#define __DT_BINDINGS_MAILBOX_IPCC_GLYMUR_H > + > +/* Glymur physical client IDs */ > +#define IPCC_MPROC_AOP 0 > +#define IPCC_MPROC_TZ 1 > +#define IPCC_MPROC_MPSS 2 > +#define IPCC_MPROC_LPASS 3 > +#define IPCC_MPROC_SLPI 4 > +#define IPCC_MPROC_SDC 5 > +#define IPCC_MPROC_CDSP 6 > +#define IPCC_MPROC_NPU 7 > +#define IPCC_MPROC_APSS 8 > +#define IPCC_MPROC_GPU 9 > +#define IPCC_MPROC_ICP 11 > +#define IPCC_MPROC_VPU 12 > +#define IPCC_MPROC_PCIE0 13 > +#define IPCC_MPROC_PCIE1 14 > +#define IPCC_MPROC_PCIE2 15 > +#define IPCC_MPROC_SPSS 16 > +#define IPCC_MPROC_PCIE3 19 > +#define IPCC_MPROC_PCIE4 20 > +#define IPCC_MPROC_PCIE5 21 > +#define IPCC_MPROC_PCIE6 22 > +#define IPCC_MPROC_TME 23 > +#define IPCC_MPROC_WPSS 24 > +#define IPCC_MPROC_PCIE7 44 > +#define IPCC_MPROC_SOCCP 46 > + > +#define IPCC_COMPUTE_L0_LPASS 0 > +#define IPCC_COMPUTE_L0_CDSP 1 > +#define IPCC_COMPUTE_L0_APSS 2 > +#define IPCC_COMPUTE_L0_GPU 3 > +#define IPCC_COMPUTE_L0_CVP 6 > +#define IPCC_COMPUTE_L0_ICP 7 > +#define IPCC_COMPUTE_L0_VPU 8 > +#define IPCC_COMPUTE_L0_DPU 9 > +#define IPCC_COMPUTE_L0_SOCCP 11 > + > +#define IPCC_COMPUTE_L1_LPASS 0 > +#define IPCC_COMPUTE_L1_CDSP 1 > +#define IPCC_COMPUTE_L1_APSS 2 > +#define IPCC_COMPUTE_L1_GPU 3 > +#define IPCC_COMPUTE_L1_CVP 6 > +#define IPCC_COMPUTE_L1_ICP 7 > +#define IPCC_COMPUTE_L1_VPU 8 > +#define IPCC_COMPUTE_L1_DPU 9 > +#define IPCC_COMPUTE_L1_SOCCP 11 > + > +#define IPCC_PERIPH_LPASS 0 > +#define IPCC_PERIPH_APSS 1 > +#define IPCC_PERIPH_PCIE0 2 > +#define IPCC_PERIPH_PCIE1 3 > +#define IPCC_PERIPH_PCIE2 6 > +#define IPCC_PERIPH_PCIE3 7 > +#define IPCC_PERIPH_PCIE4 8 > +#define IPCC_PERIPH_PCIE5 9 > +#define IPCC_PERIPH_PCIE6 10 > +#define IPCC_PERIPH_PCIE7 11 > +#define IPCC_PERIPH_SOCCP 13 > +#define IPCC_PERIPH_WPSS 16 > + > +#endif > > -- > 2.25.1 > >
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