On Tue, Oct 28, 2025 at 03:31:42PM +0200, Cosmin Tanislav wrote:
> The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI
> peripherals.
>
> Compared to the previously supported RZ/V2H, these SoCs have a smaller
> FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn,
> being the clock from which the SPI transfer clock is generated, is the
> equivalent of the TCLK from V2H.
>
> Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are
> entirely compatible.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> ---
> .../bindings/spi/renesas,rzv2h-rspi.yaml | 62 ++++++++++++++++---
> 1 file changed, 52 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> index ab27fefc3c3a..65ba120a6b23 100644
> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> @@ -9,12 +9,15 @@ title: Renesas RZ/V2H(P) Renesas Serial Peripheral Interface (RSPI)
> maintainers:
> - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
>
> -allOf:
> - - $ref: spi-controller.yaml#
> -
> properties:
> compatible:
> - const: renesas,r9a09g057-rspi # RZ/V2H(P)
> + oneOf:
> + - enum:
> + - renesas,r9a09g057-rspi # RZ/V2H(P)
> + - renesas,r9a09g077-rspi # RZ/T2H
> + - items:
> + - const: renesas,r9a09g087-rspi # RZ/N2H
> + - const: renesas,r9a09g077-rspi # RZ/T2H
>
> reg:
> maxItems: 1
> @@ -36,13 +39,12 @@ properties:
> - const: tx
>
> clocks:
> + minItems: 2
> maxItems: 3
>
> clock-names:
> - items:
> - - const: pclk
> - - const: pclk_sfr
> - - const: tclk
> + minItems: 2
> + maxItems: 3
>
> resets:
> maxItems: 2
> @@ -62,12 +64,52 @@ required:
> - interrupt-names
> - clocks
> - clock-names
> - - resets
> - - reset-names
> - power-domains
> - '#address-cells'
> - '#size-cells'
>
> +allOf:
> + - $ref: spi-controller.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g057-rspi
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: pclk
> + - const: pclk_sfr
> + - const: tclk
> +
> + required:
> + - resets
> + - reset-names
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g077-rspi
> + - renesas,r9a09g087-rspi
Do these platforms have optional resets? If they do not, please add
"resets: false" & "reset-names: false" below. If they do have optional
resets,
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable
If they don't, you can apply the tag when you add the ": false"s.
Cheers,
Conor.
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> +
> + clock-names:
> + items:
> + - const: pclk
> + - const: pclkspi
> +
> unevaluatedProperties: false
>
> examples:
> --
> 2.51.1
>