From: Niravkumar L Rabara <niravkumarlaxmidas.rabara@altera.com>

This patch series extends the EDAC support for the Agilex5 SoCFPGA.

It introduces the ECC manager (eccmgr) as a logical parent node that
manages multiple ECC hardware instances for USB, Ethernet, OCRAM, IO96B
memory controller, Secure Device Manager (SDM) QSPI, and Configuration RAM
(CRAM) Single Event Upseet(SEU).

The series includes device tree bindings update, DTS update, and EDAC
driver changes for interrupt handling, error detection and reporting
through the EDAC framework.

Niravkumar L Rabara (6):
  dt-bindings: edac: altera: Document additional ECC instances
  arm64: dts: agilex5: Add ECC manager and submodule nodes
  EDAC/altera: Add DBE interrupt handling for Agilex5
  EDAC/altera: Add IO96B ECC support for Agilex5 SoCFPGA
  EDAC/altera: Add support for CRAM SEU error handling on SoCFPGA
  EDAC: altera: Add ECC support for SDM QSPI on Agilex5

 .../edac/altr,socfpga-ecc-manager.yaml        |  77 +-
 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  98 +++
 drivers/edac/Kconfig                          |  33 +
 drivers/edac/altera_edac.c                    | 670 ++++++++++++++++--
 drivers/edac/altera_edac.h                    |  56 ++
 include/linux/firmware/intel/stratix10-smc.h  |  55 ++
 6 files changed, 948 insertions(+), 41 deletions(-)

-- 
2.25.1