On H6/H616, the register ECC_PAT_FOUND is at its own address, and not
part of ECC status register.
So, introduce the pattern found register offset in sunxi_nfc_caps, along
with its mask.
Also, introduce a non compile-time field_get() because FIELD_GET() and
u32_get_bits() don't work with non compile-time constant.
https://lore.kernel.org/all/cover.1761588465.git.geert+renesas@glider.be
No functional change.
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
---
drivers/mtd/nand/raw/sunxi_nand.c | 36 ++++++++++++++++++++++++++-----
1 file changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 89495d786293..021034a761b7 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -29,6 +29,9 @@
#include <linux/iopoll.h>
#include <linux/reset.h>
+/* non compile-time field get */
+#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
+
#define NFC_REG_CTL 0x0000
#define NFC_REG_ST 0x0004
#define NFC_REG_INT 0x0008
@@ -150,7 +153,13 @@
/* define bit use in NFC_ECC_ST */
#define NFC_ECC_ERR(x) BIT(x)
#define NFC_ECC_ERR_MSK GENMASK(15, 0)
-#define NFC_ECC_PAT_FOUND(x) BIT(x + 16)
+
+/*
+ * define bit use in NFC_REG_PAT_FOUND
+ * For A10/A23, NFC_REG_PAT_FOUND == NFC_ECC_ST register
+ */
+#define NFC_ECC_PAT_FOUND_MSK(nfc) (nfc->caps->pat_found_mask)
+
#define NFC_ECC_ERR_CNT(b, x) (((x) >> (((b) % 4) * 8)) & 0xff)
#define NFC_DEFAULT_TIMEOUT_MS 1000
@@ -227,6 +236,8 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
* @reg_io_data: I/O data register
* @reg_ecc_err_cnt: ECC error counter register
* @reg_user_data: User data register
+ * @reg_pat_found: Data Pattern Status Register
+ * @pat_found_mask: ECC_PAT_FOUND mask in NFC_REG_PAT_FOUND register
* @dma_maxburst: DMA maxburst
* @ecc_strengths: Available ECC strengths array
* @nstrengths: Size of @ecc_strengths
@@ -236,6 +247,8 @@ struct sunxi_nfc_caps {
unsigned int reg_io_data;
unsigned int reg_ecc_err_cnt;
unsigned int reg_user_data;
+ unsigned int reg_pat_found;
+ unsigned int pat_found_mask;
unsigned int dma_maxburst;
const u8 *ecc_strengths;
unsigned int nstrengths;
@@ -776,7 +789,8 @@ static void sunxi_nfc_hw_ecc_update_stats(struct nand_chip *nand,
}
static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
- int step, u32 status, bool *erased)
+ int step, u32 status, u32 pattern_found,
+ bool *erased)
{
struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
struct nand_ecc_ctrl *ecc = &nand->ecc;
@@ -787,7 +801,7 @@ static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
if (status & NFC_ECC_ERR(step))
return -EBADMSG;
- if (status & NFC_ECC_PAT_FOUND(step)) {
+ if (pattern_found & BIT(step)) {
u8 pattern;
if (unlikely(!(readl(nfc->regs + NFC_REG_PAT_ID) & 0x1))) {
@@ -821,6 +835,7 @@ static int sunxi_nfc_hw_ecc_read_chunk(struct nand_chip *nand,
struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
struct nand_ecc_ctrl *ecc = &nand->ecc;
int raw_mode = 0;
+ u32 pattern_found;
bool erased;
int ret;
@@ -848,8 +863,12 @@ static int sunxi_nfc_hw_ecc_read_chunk(struct nand_chip *nand,
*cur_off = oob_off + ecc->bytes + USER_DATA_SZ;
+ pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
+ pattern_found = field_get(NFC_ECC_PAT_FOUND_MSK(nfc), pattern_found);
+
ret = sunxi_nfc_hw_ecc_correct(nand, data, oob_required ? oob : NULL, 0,
readl(nfc->regs + NFC_REG_ECC_ST),
+ pattern_found,
&erased);
if (erased)
return 1;
@@ -930,7 +949,7 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
unsigned int max_bitflips = 0;
int ret, i, raw_mode = 0;
struct scatterlist sg;
- u32 status, wait;
+ u32 status, pattern_found, wait;
ret = sunxi_nfc_wait_cmd_fifo_empty(nfc);
if (ret)
@@ -971,6 +990,8 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
return ret;
status = readl(nfc->regs + NFC_REG_ECC_ST);
+ pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
+ pattern_found = field_get(NFC_ECC_PAT_FOUND_MSK(nfc), pattern_found);
for (i = 0; i < nchunks; i++) {
int data_off = i * ecc->size;
@@ -981,7 +1002,8 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
ret = sunxi_nfc_hw_ecc_correct(nand, randomized ? data : NULL,
oob_required ? oob : NULL,
- i, status, &erased);
+ i, status, pattern_found,
+ &erased);
/* ECC errors are handled in the second loop. */
if (ret < 0)
@@ -2195,6 +2217,8 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
.reg_io_data = NFC_REG_A10_IO_DATA,
.reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.reg_user_data = NFC_REG_A10_USER_DATA,
+ .reg_pat_found = NFC_REG_ECC_ST,
+ .pat_found_mask = GENMASK(31, 16),
.dma_maxburst = 4,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
@@ -2205,6 +2229,8 @@ static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
.reg_io_data = NFC_REG_A23_IO_DATA,
.reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
.reg_user_data = NFC_REG_A10_USER_DATA,
+ .reg_pat_found = NFC_REG_ECC_ST,
+ .pat_found_mask = GENMASK(31, 16),
.dma_maxburst = 8,
.ecc_strengths = sunxi_ecc_strengths_a10,
.nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
--
2.47.3
Dne torek, 28. oktober 2025 ob 08:35:00 Srednjeevropski standardni čas je Richard Genoud napisal(a):
> On H6/H616, the register ECC_PAT_FOUND is at its own address, and not
> part of ECC status register.
> So, introduce the pattern found register offset in sunxi_nfc_caps, along
> with its mask.
>
> Also, introduce a non compile-time field_get() because FIELD_GET() and
> u32_get_bits() don't work with non compile-time constant.
> https://lore.kernel.org/all/cover.1761588465.git.geert+renesas@glider.be
Urls should use Link: tag and be placed at the bottom.
Code itself looks fine.
Best regards,
Jernej
>
> No functional change.
>
> Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
> ---
> drivers/mtd/nand/raw/sunxi_nand.c | 36 ++++++++++++++++++++++++++-----
> 1 file changed, 31 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
> index 89495d786293..021034a761b7 100644
> --- a/drivers/mtd/nand/raw/sunxi_nand.c
> +++ b/drivers/mtd/nand/raw/sunxi_nand.c
> @@ -29,6 +29,9 @@
> #include <linux/iopoll.h>
> #include <linux/reset.h>
>
> +/* non compile-time field get */
> +#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1))
> +
> #define NFC_REG_CTL 0x0000
> #define NFC_REG_ST 0x0004
> #define NFC_REG_INT 0x0008
> @@ -150,7 +153,13 @@
> /* define bit use in NFC_ECC_ST */
> #define NFC_ECC_ERR(x) BIT(x)
> #define NFC_ECC_ERR_MSK GENMASK(15, 0)
> -#define NFC_ECC_PAT_FOUND(x) BIT(x + 16)
> +
> +/*
> + * define bit use in NFC_REG_PAT_FOUND
> + * For A10/A23, NFC_REG_PAT_FOUND == NFC_ECC_ST register
> + */
> +#define NFC_ECC_PAT_FOUND_MSK(nfc) (nfc->caps->pat_found_mask)
> +
> #define NFC_ECC_ERR_CNT(b, x) (((x) >> (((b) % 4) * 8)) & 0xff)
>
> #define NFC_DEFAULT_TIMEOUT_MS 1000
> @@ -227,6 +236,8 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
> * @reg_io_data: I/O data register
> * @reg_ecc_err_cnt: ECC error counter register
> * @reg_user_data: User data register
> + * @reg_pat_found: Data Pattern Status Register
> + * @pat_found_mask: ECC_PAT_FOUND mask in NFC_REG_PAT_FOUND register
> * @dma_maxburst: DMA maxburst
> * @ecc_strengths: Available ECC strengths array
> * @nstrengths: Size of @ecc_strengths
> @@ -236,6 +247,8 @@ struct sunxi_nfc_caps {
> unsigned int reg_io_data;
> unsigned int reg_ecc_err_cnt;
> unsigned int reg_user_data;
> + unsigned int reg_pat_found;
> + unsigned int pat_found_mask;
> unsigned int dma_maxburst;
> const u8 *ecc_strengths;
> unsigned int nstrengths;
> @@ -776,7 +789,8 @@ static void sunxi_nfc_hw_ecc_update_stats(struct nand_chip *nand,
> }
>
> static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
> - int step, u32 status, bool *erased)
> + int step, u32 status, u32 pattern_found,
> + bool *erased)
> {
> struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
> struct nand_ecc_ctrl *ecc = &nand->ecc;
> @@ -787,7 +801,7 @@ static int sunxi_nfc_hw_ecc_correct(struct nand_chip *nand, u8 *data, u8 *oob,
> if (status & NFC_ECC_ERR(step))
> return -EBADMSG;
>
> - if (status & NFC_ECC_PAT_FOUND(step)) {
> + if (pattern_found & BIT(step)) {
> u8 pattern;
>
> if (unlikely(!(readl(nfc->regs + NFC_REG_PAT_ID) & 0x1))) {
> @@ -821,6 +835,7 @@ static int sunxi_nfc_hw_ecc_read_chunk(struct nand_chip *nand,
> struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
> struct nand_ecc_ctrl *ecc = &nand->ecc;
> int raw_mode = 0;
> + u32 pattern_found;
> bool erased;
> int ret;
>
> @@ -848,8 +863,12 @@ static int sunxi_nfc_hw_ecc_read_chunk(struct nand_chip *nand,
>
> *cur_off = oob_off + ecc->bytes + USER_DATA_SZ;
>
> + pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
> + pattern_found = field_get(NFC_ECC_PAT_FOUND_MSK(nfc), pattern_found);
> +
> ret = sunxi_nfc_hw_ecc_correct(nand, data, oob_required ? oob : NULL, 0,
> readl(nfc->regs + NFC_REG_ECC_ST),
> + pattern_found,
> &erased);
> if (erased)
> return 1;
> @@ -930,7 +949,7 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
> unsigned int max_bitflips = 0;
> int ret, i, raw_mode = 0;
> struct scatterlist sg;
> - u32 status, wait;
> + u32 status, pattern_found, wait;
>
> ret = sunxi_nfc_wait_cmd_fifo_empty(nfc);
> if (ret)
> @@ -971,6 +990,8 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
> return ret;
>
> status = readl(nfc->regs + NFC_REG_ECC_ST);
> + pattern_found = readl(nfc->regs + nfc->caps->reg_pat_found);
> + pattern_found = field_get(NFC_ECC_PAT_FOUND_MSK(nfc), pattern_found);
>
> for (i = 0; i < nchunks; i++) {
> int data_off = i * ecc->size;
> @@ -981,7 +1002,8 @@ static int sunxi_nfc_hw_ecc_read_chunks_dma(struct nand_chip *nand, uint8_t *buf
>
> ret = sunxi_nfc_hw_ecc_correct(nand, randomized ? data : NULL,
> oob_required ? oob : NULL,
> - i, status, &erased);
> + i, status, pattern_found,
> + &erased);
>
> /* ECC errors are handled in the second loop. */
> if (ret < 0)
> @@ -2195,6 +2217,8 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
> .reg_io_data = NFC_REG_A10_IO_DATA,
> .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
> .reg_user_data = NFC_REG_A10_USER_DATA,
> + .reg_pat_found = NFC_REG_ECC_ST,
> + .pat_found_mask = GENMASK(31, 16),
> .dma_maxburst = 4,
> .ecc_strengths = sunxi_ecc_strengths_a10,
> .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
> @@ -2205,6 +2229,8 @@ static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
> .reg_io_data = NFC_REG_A23_IO_DATA,
> .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
> .reg_user_data = NFC_REG_A10_USER_DATA,
> + .reg_pat_found = NFC_REG_ECC_ST,
> + .pat_found_mask = GENMASK(31, 16),
> .dma_maxburst = 8,
> .ecc_strengths = sunxi_ecc_strengths_a10,
> .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
>
On 28/10/2025 at 16:41:48 +01, Jernej Škrabec <jernej.skrabec@gmail.com> wrote: > Dne torek, 28. oktober 2025 ob 08:35:00 Srednjeevropski standardni čas je Richard Genoud napisal(a): >> On H6/H616, the register ECC_PAT_FOUND is at its own address, and not >> part of ECC status register. >> So, introduce the pattern found register offset in sunxi_nfc_caps, along >> with its mask. >> >> Also, introduce a non compile-time field_get() because FIELD_GET() and >> u32_get_bits() don't work with non compile-time constant. >> https://lore.kernel.org/all/cover.1761588465.git.geert+renesas@glider.be > > Urls should use Link: tag and be placed at the bottom. I was about to apply, so I'll fix this while applying. > > Code itself looks fine. Thanks for the review! Miquèl
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