1. Patchew
  2. linux
  3. [PATCH v4 0/8] clk: amlogic: Add A5 SoC PLLs and Peripheral clock
  4. View patch

[PATCH v4 1/8] dt-bindings: clock: Add Amlogic A5 SCMI clock controller support

Chuan Liu via B4 Relay posted 8 patches 3 months, 1 week ago
There is a newer version of this series
[PATCH v4 1/8] dt-bindings: clock: Add Amlogic A5 SCMI clock controller support
Posted by Chuan Liu via B4 Relay 3 months, 1 week ago 
From: Chuan Liu <chuan.liu@amlogic.com>

Add the SCMI clock controller dt-bindings for the Amlogic A5 SoC
family.

Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
---
 include/dt-bindings/clock/amlogic,a5-scmi-clkc.h | 44 ++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
new file mode 100644
index 000000000000..1bf027d0110a
--- /dev/null
+++ b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
+/*
+ * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
+ * Author: Chuan Liu <chuan.liu@amlogic.com>
+ */
+
+#ifndef __AMLOGIC_A5_SCMI_CLKC_H
+#define __AMLOGIC_A5_SCMI_CLKC_H
+
+#define CLKID_OSC				0
+#define CLKID_SYS_CLK				1
+#define CLKID_AXI_CLK				2
+#define CLKID_CPU_CLK				3
+#define CLKID_DSU_CLK				4
+#define CLKID_GP1_PLL				5
+#define CLKID_FIXED_PLL_DCO			6
+#define CLKID_FIXED_PLL				7
+#define CLKID_ACLKM				8
+#define CLKID_SYS_PLL_DIV16			9
+#define CLKID_CPU_CLK_DIV16			10
+#define CLKID_FCLK_50M_PREDIV			11
+#define CLKID_FCLK_50M_DIV			12
+#define CLKID_FCLK_50M				13
+#define CLKID_FCLK_DIV2_DIV			14
+#define CLKID_FCLK_DIV2				15
+#define CLKID_FCLK_DIV2P5_DIV			16
+#define CLKID_FCLK_DIV2P5			17
+#define CLKID_FCLK_DIV3_DIV			18
+#define CLKID_FCLK_DIV3				19
+#define CLKID_FCLK_DIV4_DIV			20
+#define CLKID_FCLK_DIV4				21
+#define CLKID_FCLK_DIV5_DIV			22
+#define CLKID_FCLK_DIV5				23
+#define CLKID_FCLK_DIV7_DIV			24
+#define CLKID_FCLK_DIV7				25
+#define CLKID_SYS_MMC_PCLK			26
+#define CLKID_SYS_CPU_CTRL			27
+#define CLKID_SYS_IRQ_CTRL			28
+#define CLKID_SYS_GIC				29
+#define CLKID_SYS_BIG_NIC			30
+#define CLKID_AXI_SYS_NIC			31
+#define CLKID_AXI_CPU_DMC			32
+
+#endif /* __AMLOGIC_A5_SCMI_CLKC_H */

-- 
2.42.0
Re: [PATCH v4 1/8] dt-bindings: clock: Add Amlogic A5 SCMI clock controller support
Posted by Jerome Brunet 1 month, 2 weeks ago 
On Tue 28 Oct 2025 at 17:52, Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org> wrote:

> From: Chuan Liu <chuan.liu@amlogic.com>
>
> Add the SCMI clock controller dt-bindings for the Amlogic A5 SoC
> family.
>
> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>

Please read:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?h=v6.19-rc1#n503

and adjust your patches accordingly

> ---
>  include/dt-bindings/clock/amlogic,a5-scmi-clkc.h | 44 ++++++++++++++++++++++++
>  1 file changed, 44 insertions(+)
>
> diff --git a/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
> new file mode 100644
> index 000000000000..1bf027d0110a
> --- /dev/null
> +++ b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
> + * Author: Chuan Liu <chuan.liu@amlogic.com>
> + */
> +
> +#ifndef __AMLOGIC_A5_SCMI_CLKC_H
> +#define __AMLOGIC_A5_SCMI_CLKC_H
> +
> +#define CLKID_OSC				0
> +#define CLKID_SYS_CLK				1
> +#define CLKID_AXI_CLK				2
> +#define CLKID_CPU_CLK				3
> +#define CLKID_DSU_CLK				4
> +#define CLKID_GP1_PLL				5
> +#define CLKID_FIXED_PLL_DCO			6
> +#define CLKID_FIXED_PLL				7
> +#define CLKID_ACLKM				8
> +#define CLKID_SYS_PLL_DIV16			9
> +#define CLKID_CPU_CLK_DIV16			10
> +#define CLKID_FCLK_50M_PREDIV			11
> +#define CLKID_FCLK_50M_DIV			12
> +#define CLKID_FCLK_50M				13
> +#define CLKID_FCLK_DIV2_DIV			14
> +#define CLKID_FCLK_DIV2				15
> +#define CLKID_FCLK_DIV2P5_DIV			16
> +#define CLKID_FCLK_DIV2P5			17
> +#define CLKID_FCLK_DIV3_DIV			18
> +#define CLKID_FCLK_DIV3				19
> +#define CLKID_FCLK_DIV4_DIV			20
> +#define CLKID_FCLK_DIV4				21
> +#define CLKID_FCLK_DIV5_DIV			22
> +#define CLKID_FCLK_DIV5				23
> +#define CLKID_FCLK_DIV7_DIV			24
> +#define CLKID_FCLK_DIV7				25
> +#define CLKID_SYS_MMC_PCLK			26
> +#define CLKID_SYS_CPU_CTRL			27
> +#define CLKID_SYS_IRQ_CTRL			28
> +#define CLKID_SYS_GIC				29
> +#define CLKID_SYS_BIG_NIC			30
> +#define CLKID_AXI_SYS_NIC			31
> +#define CLKID_AXI_CPU_DMC			32
> +
> +#endif /* __AMLOGIC_A5_SCMI_CLKC_H */

-- 
Jerome
Re: [PATCH v4 1/8] dt-bindings: clock: Add Amlogic A5 SCMI clock controller support
Posted by Chuan Liu 1 month, 2 weeks ago 
Hi Jerome,
Thanks for coming back to review. Y

On 12/23/2025 4:59 PM, Jerome Brunet wrote:
> [ EXTERNAL EMAIL ]
> 
> On Tue 28 Oct 2025 at 17:52, Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org> wrote:
> 
>> From: Chuan Liu <chuan.liu@amlogic.com>
>>
>> Add the SCMI clock controller dt-bindings for the Amlogic A5 SoC
>> family.
>>
>> Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
>> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
>> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
> 
> Please read:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/submitting-patches.rst?h=v6.19-rc1#n503
> 
> and adjust your patches accordingly
> 

Thanks for pointing that out. I'll address it.

>> ---
>>   include/dt-bindings/clock/amlogic,a5-scmi-clkc.h | 44 ++++++++++++++++++++++++
>>   1 file changed, 44 insertions(+)
>>
>> diff --git a/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
>> new file mode 100644
>> index 000000000000..1bf027d0110a
>> --- /dev/null
>> +++ b/include/dt-bindings/clock/amlogic,a5-scmi-clkc.h
>> @@ -0,0 +1,44 @@
>> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
>> +/*
>> + * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
>> + * Author: Chuan Liu <chuan.liu@amlogic.com>
>> + */
>> +
>> +#ifndef __AMLOGIC_A5_SCMI_CLKC_H
>> +#define __AMLOGIC_A5_SCMI_CLKC_H
>> +
>> +#define CLKID_OSC                            0
>> +#define CLKID_SYS_CLK                                1
>> +#define CLKID_AXI_CLK                                2
>> +#define CLKID_CPU_CLK                                3
>> +#define CLKID_DSU_CLK                                4
>> +#define CLKID_GP1_PLL                                5
>> +#define CLKID_FIXED_PLL_DCO                  6
>> +#define CLKID_FIXED_PLL                              7
>> +#define CLKID_ACLKM                          8
>> +#define CLKID_SYS_PLL_DIV16                  9
>> +#define CLKID_CPU_CLK_DIV16                  10
>> +#define CLKID_FCLK_50M_PREDIV                        11
>> +#define CLKID_FCLK_50M_DIV                   12
>> +#define CLKID_FCLK_50M                               13
>> +#define CLKID_FCLK_DIV2_DIV                  14
>> +#define CLKID_FCLK_DIV2                              15
>> +#define CLKID_FCLK_DIV2P5_DIV                        16
>> +#define CLKID_FCLK_DIV2P5                    17
>> +#define CLKID_FCLK_DIV3_DIV                  18
>> +#define CLKID_FCLK_DIV3                              19
>> +#define CLKID_FCLK_DIV4_DIV                  20
>> +#define CLKID_FCLK_DIV4                              21
>> +#define CLKID_FCLK_DIV5_DIV                  22
>> +#define CLKID_FCLK_DIV5                              23
>> +#define CLKID_FCLK_DIV7_DIV                  24
>> +#define CLKID_FCLK_DIV7                              25
>> +#define CLKID_SYS_MMC_PCLK                   26
>> +#define CLKID_SYS_CPU_CTRL                   27
>> +#define CLKID_SYS_IRQ_CTRL                   28
>> +#define CLKID_SYS_GIC                                29
>> +#define CLKID_SYS_BIG_NIC                    30
>> +#define CLKID_AXI_SYS_NIC                    31
>> +#define CLKID_AXI_CPU_DMC                    32
>> +
>> +#endif /* __AMLOGIC_A5_SCMI_CLKC_H */
> 
> --
> Jerome

Patchew 2.1-devel-b67e4c2

© 2016 - 2026 Red Hat, Inc.