[PATCH net-next] net: phy: micrel: lan8842 erratas

Horatiu Vultur posted 1 patch 3 months, 1 week ago
drivers/net/phy/micrel.c | 166 +++++++++++++++++++++++++++++++++++++++
1 file changed, 166 insertions(+)
[PATCH net-next] net: phy: micrel: lan8842 erratas
Posted by Horatiu Vultur 3 months, 1 week ago
Add two erratas for lan8842. The errata document can be found here [1].
This is fixing the module 2 ("Analog front-end not optimized for
PHY-side shorted center taps") and module 7 ("1000BASE-T PMA EEE TX wake
timer is non-compliant")

[1] https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/Errata/LAN8842-Errata-DS80001172.pdf

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
---
 drivers/net/phy/micrel.c | 166 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 166 insertions(+)

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index edca0024b7c73..60788dba3ee8d 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -2837,6 +2837,13 @@ static int ksz886x_cable_test_get_status(struct phy_device *phydev,
  */
 #define LAN8814_PAGE_PCS_DIGITAL 2
 
+/**
+ * LAN8814_PAGE_EEE - Selects Extended Page 3.
+ *
+ * This page contains EEE registers
+ */
+#define LAN8814_PAGE_EEE 3
+
 /**
  * LAN8814_PAGE_COMMON_REGS - Selects Extended Page 4.
  *
@@ -2855,6 +2862,13 @@ static int ksz886x_cable_test_get_status(struct phy_device *phydev,
  */
 #define LAN8814_PAGE_PORT_REGS 5
 
+/**
+ * LAN8814_PAGE_POWER_REGS - Selects Extended Page 28.
+ *
+ * This page contains analog control registers and power mode registers.
+ */
+#define LAN8814_PAGE_POWER_REGS 28
+
 /**
  * LAN8814_PAGE_SYSTEM_CTRL - Selects Extended Page 31.
  *
@@ -5918,6 +5932,153 @@ static int lan8842_probe(struct phy_device *phydev)
 	return 0;
 }
 
+#define LAN8814_POWER_MGMT_MODE_3_ANEG_MDI		0x13
+#define LAN8814_POWER_MGMT_MODE_4_ANEG_MDIX		0x14
+#define LAN8814_POWER_MGMT_MODE_5_10BT_MDI		0x15
+#define LAN8814_POWER_MGMT_MODE_6_10BT_MDIX		0x15
+#define LAN8814_POWER_MGMT_MODE_7_100BT_TRAIN		0x15
+#define LAN8814_POWER_MGMT_MODE_8_100BT_MDI		0x15
+#define LAN8814_POWER_MGMT_MODE_9_100BT_EEE_MDI_TX	0x15
+#define LAN8814_POWER_MGMT_MODE_10_100BT_EEE_MDI_RX	0x15
+#define LAN8814_POWER_MGMT_MODE_11_100BT_MDIX		0x1b
+#define LAN8814_POWER_MGMT_MODE_12_100BT_EEE_MDIX_TX	0x15
+#define LAN8814_POWER_MGMT_MODE_13_100BT_EEE_MDIX_RX	0x15
+#define LAN8814_POWER_MGMT_MODE_14_100BTX_EEE_TX_RX	0x1e
+
+#define LAN8814_POWER_MGMT_DLLPD_D			BIT(0)
+#define LAN8814_POWER_MGMT_ADCPD_D			BIT(1)
+#define LAN8814_POWER_MGMT_PGAPD_D			BIT(2)
+#define LAN8814_POWER_MGMT_TXPD_D			BIT(3)
+#define LAN8814_POWER_MGMT_DLLPD_C			BIT(4)
+#define LAN8814_POWER_MGMT_ADCPD_C			BIT(5)
+#define LAN8814_POWER_MGMT_PGAPD_C			BIT(6)
+#define LAN8814_POWER_MGMT_TXPD_C			BIT(7)
+#define LAN8814_POWER_MGMT_DLLPD_B			BIT(8)
+#define LAN8814_POWER_MGMT_ADCPD_B			BIT(9)
+#define LAN8814_POWER_MGMT_PGAPD_B			BIT(10)
+#define LAN8814_POWER_MGMT_TXPD_B			BIT(11)
+#define LAN8814_POWER_MGMT_DLLPD_A			BIT(12)
+#define LAN8814_POWER_MGMT_ADCPD_A			BIT(13)
+#define LAN8814_POWER_MGMT_PGAPD_A			BIT(14)
+#define LAN8814_POWER_MGMT_TXPD_A			BIT(15)
+
+#define LAN8814_POWER_MGMT_C_D		(LAN8814_POWER_MGMT_DLLPD_D | \
+					 LAN8814_POWER_MGMT_ADCPD_D | \
+					 LAN8814_POWER_MGMT_PGAPD_D | \
+					 LAN8814_POWER_MGMT_DLLPD_C | \
+					 LAN8814_POWER_MGMT_ADCPD_C | \
+					 LAN8814_POWER_MGMT_PGAPD_C)
+
+#define LAN8814_POWER_MGMT_B_C_D	(LAN8814_POWER_MGMT_C_D | \
+					 LAN8814_POWER_MGMT_DLLPD_B | \
+					 LAN8814_POWER_MGMT_ADCPD_B | \
+					 LAN8814_POWER_MGMT_PGAPD_B)
+
+#define LAN8814_POWER_MGMT_VAL1		(LAN8814_POWER_MGMT_C_D | \
+					 LAN8814_POWER_MGMT_ADCPD_B | \
+					 LAN8814_POWER_MGMT_PGAPD_B | \
+					 LAN8814_POWER_MGMT_ADCPD_A | \
+					 LAN8814_POWER_MGMT_PGAPD_A)
+
+#define LAN8814_POWER_MGMT_VAL2		LAN8814_POWER_MGMT_C_D
+
+#define LAN8814_POWER_MGMT_VAL3		(LAN8814_POWER_MGMT_C_D | \
+					 LAN8814_POWER_MGMT_DLLPD_B | \
+					 LAN8814_POWER_MGMT_ADCPD_B | \
+					 LAN8814_POWER_MGMT_PGAPD_A)
+
+#define LAN8814_POWER_MGMT_VAL4		(LAN8814_POWER_MGMT_B_C_D | \
+					 LAN8814_POWER_MGMT_ADCPD_A | \
+					 LAN8814_POWER_MGMT_PGAPD_A)
+
+#define LAN8814_POWER_MGMT_VAL5		LAN8814_POWER_MGMT_B_C_D
+
+#define LAN8814_EEE_WAKE_TX_TIMER			0x0e
+#define LAN8814_EEE_WAKE_TX_TIMER_MAX_VAL		0x1f
+
+static int lan8842_erratas(struct phy_device *phydev)
+{
+	int ret;
+
+	/* Magjack center tapped ports */
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_3_ANEG_MDI,
+				    LAN8814_POWER_MGMT_VAL1);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_4_ANEG_MDIX,
+				    LAN8814_POWER_MGMT_VAL1);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_5_10BT_MDI,
+				    LAN8814_POWER_MGMT_VAL1);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_6_10BT_MDIX,
+				    LAN8814_POWER_MGMT_VAL1);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_7_100BT_TRAIN,
+				    LAN8814_POWER_MGMT_VAL2);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_8_100BT_MDI,
+				    LAN8814_POWER_MGMT_VAL3);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_9_100BT_EEE_MDI_TX,
+				    LAN8814_POWER_MGMT_VAL3);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_10_100BT_EEE_MDI_RX,
+				    LAN8814_POWER_MGMT_VAL4);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_11_100BT_MDIX,
+				    LAN8814_POWER_MGMT_VAL5);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_12_100BT_EEE_MDIX_TX,
+				    LAN8814_POWER_MGMT_VAL5);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_13_100BT_EEE_MDIX_RX,
+				    LAN8814_POWER_MGMT_VAL4);
+	if (ret < 0)
+		return ret;
+
+	ret = lanphy_write_page_reg(phydev, LAN8814_PAGE_POWER_REGS,
+				    LAN8814_POWER_MGMT_MODE_14_100BTX_EEE_TX_RX,
+				    LAN8814_POWER_MGMT_VAL4);
+	if (ret < 0)
+		return ret;
+
+	/* Refresh time Waketx timer */
+	return lanphy_write_page_reg(phydev, LAN8814_PAGE_EEE,
+				     LAN8814_EEE_WAKE_TX_TIMER,
+				     LAN8814_EEE_WAKE_TX_TIMER_MAX_VAL);
+}
+
 static int lan8842_config_init(struct phy_device *phydev)
 {
 	int ret;
@@ -5930,6 +6091,11 @@ static int lan8842_config_init(struct phy_device *phydev)
 	if (ret < 0)
 		return ret;
 
+	/* Apply the erratas for this device */
+	ret = lan8842_erratas(phydev);
+	if (ret < 0)
+		return ret;
+
 	/* Even if the GPIOs are set to control the LEDs the behaviour of the
 	 * LEDs is wrong, they are not blinking when there is traffic.
 	 * To fix this it is required to set extended LED mode
-- 
2.34.1
Re: [PATCH net-next] net: phy: micrel: lan8842 erratas
Posted by Andrew Lunn 3 months, 1 week ago
On Mon, Oct 27, 2025 at 01:40:26PM +0100, Horatiu Vultur wrote:
> Add two erratas for lan8842. The errata document can be found here [1].
> This is fixing the module 2 ("Analog front-end not optimized for
> PHY-side shorted center taps") and module 7 ("1000BASE-T PMA EEE TX wake
> timer is non-compliant")

Hi Horatiu

Could this be split into two patches, since there are two erratas?

I notice there is no Fixes: tag. So you don't think these are worth
back porting?

	Andrew
Re: [PATCH net-next] net: phy: micrel: lan8842 erratas
Posted by Horatiu Vultur 3 months, 1 week ago
The 10/27/2025 14:05, Andrew Lunn wrote:
> 
> On Mon, Oct 27, 2025 at 01:40:26PM +0100, Horatiu Vultur wrote:
> > Add two erratas for lan8842. The errata document can be found here [1].
> > This is fixing the module 2 ("Analog front-end not optimized for
> > PHY-side shorted center taps") and module 7 ("1000BASE-T PMA EEE TX wake
> > timer is non-compliant")
> 
> Hi Horatiu

Hi Andrew,

> 
> Could this be split into two patches, since there are two erratas?

Yes, I will split them in the next version

> 
> I notice there is no Fixes: tag. So you don't think these are worth
> back porting?

Definetly I would like to be ported but the issue was there from
beginning when the lan8842 was added, so I was not sure if it is OK to
send it to net.

> 
>         Andrew

-- 
/Horatiu
Re: [PATCH net-next] net: phy: micrel: lan8842 erratas
Posted by Andrew Lunn 3 months, 1 week ago
> > I notice there is no Fixes: tag. So you don't think these are worth
> > back porting?
> 
> Definetly I would like to be ported but the issue was there from
> beginning when the lan8842 was added, so I was not sure if it is OK to
> send it to net.

https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html

says:

It must either fix a real bug that bothers people or just add a device ID.

Does this bother people?

	Andrew
Re: [PATCH net-next] net: phy: micrel: lan8842 erratas
Posted by Horatiu Vultur 3 months, 1 week ago
The 10/28/2025 13:04, Andrew Lunn wrote:
> 
> > > I notice there is no Fixes: tag. So you don't think these are worth
> > > back porting?
> >
> > Definetly I would like to be ported but the issue was there from
> > beginning when the lan8842 was added, so I was not sure if it is OK to
> > send it to net.
> 
> https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> 
> says:
> 
> It must either fix a real bug that bothers people or just add a device ID.
> 
> Does this bother people?

Yes, I would say so.

> 
>         Andrew

-- 
/Horatiu