[PATCH v5 06/10] arm64: dts: socfpga: agilex5: add dwxgmac compatible

Steffen Trumtrar posted 10 patches 3 months, 2 weeks ago
[PATCH v5 06/10] arm64: dts: socfpga: agilex5: add dwxgmac compatible
Posted by Steffen Trumtrar 3 months, 2 weeks ago
The gmac0/1/2 are also compatible to the more generic "snps,dwxgmac"
compatible. The platform code checks this to decide if it is a GMAC or
GMAC4 compatible IP core.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 4ccfebfd9d322..d0c139f03541e 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -536,7 +536,8 @@ qspi: spi@108d2000 {
 
 		gmac0: ethernet@10810000 {
 			compatible = "altr,socfpga-stmmac-agilex5",
-				     "snps,dwxgmac-2.10";
+				     "snps,dwxgmac-2.10",
+				     "snps,dwxgmac";
 			reg = <0x10810000 0x3500>;
 			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
@@ -649,7 +650,8 @@ queue7 {
 
 		gmac1: ethernet@10820000 {
 			compatible = "altr,socfpga-stmmac-agilex5",
-				     "snps,dwxgmac-2.10";
+				     "snps,dwxgmac-2.10",
+				     "snps,dwxgmac";
 			reg = <0x10820000 0x3500>;
 			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";
@@ -762,7 +764,8 @@ queue7 {
 
 		gmac2: ethernet@10830000 {
 			compatible = "altr,socfpga-stmmac-agilex5",
-				     "snps,dwxgmac-2.10";
+				     "snps,dwxgmac-2.10",
+				     "snps,dwxgmac";
 			reg = <0x10830000 0x3500>;
 			interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "macirq";

-- 
2.51.0
Re: [PATCH v5 06/10] arm64: dts: socfpga: agilex5: add dwxgmac compatible
Posted by Dinh Nguyen 3 months, 2 weeks ago
Hi Steffen,

On 10/24/25 06:49, Steffen Trumtrar wrote:
> The gmac0/1/2 are also compatible to the more generic "snps,dwxgmac"
> compatible. The platform code checks this to decide if it is a GMAC or
> GMAC4 compatible IP core.
> 
> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> ---
>   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 ++++++---
>   1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 4ccfebfd9d322..d0c139f03541e 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -536,7 +536,8 @@ qspi: spi@108d2000 {
>   
>   		gmac0: ethernet@10810000 {
>   			compatible = "altr,socfpga-stmmac-agilex5",
> -				     "snps,dwxgmac-2.10";
> +				     "snps,dwxgmac-2.10",
> +				     "snps,dwxgmac";
>   			reg = <0x10810000 0x3500>;
>   			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
>   			interrupt-names = "macirq";
> @@ -649,7 +650,8 @@ queue7 {
>   
>   		gmac1: ethernet@10820000 {
>   			compatible = "altr,socfpga-stmmac-agilex5",
> -				     "snps,dwxgmac-2.10";
> +				     "snps,dwxgmac-2.10",
> +				     "snps,dwxgmac";
>   			reg = <0x10820000 0x3500>;
>   			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
>   			interrupt-names = "macirq";
> @@ -762,7 +764,8 @@ queue7 {
>   
>   		gmac2: ethernet@10830000 {
>   			compatible = "altr,socfpga-stmmac-agilex5",
> -				     "snps,dwxgmac-2.10";
> +				     "snps,dwxgmac-2.10",
> +				     "snps,dwxgmac";
>   			reg = <0x10830000 0x3500>;
>   			interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
>   			interrupt-names = "macirq";
> 

I just sent a patch for this yesterday:

https://lore.kernel.org/all/20251023214012.283600-1-dinguyen@kernel.org/

I'll make sure to include you on future submissions.

I didn't add it to the bindings document though.

Dinh
Re: [PATCH v5 06/10] arm64: dts: socfpga: agilex5: add dwxgmac compatible
Posted by Steffen Trumtrar 3 months, 2 weeks ago
Hi Dinh,

On 2025-10-24 at 07:00 -05, Dinh Nguyen <dinguyen@kernel.org> wrote:

> Hi Steffen,
> 
> On 10/24/25 06:49, Steffen Trumtrar wrote:
> > The gmac0/1/2 are also compatible to the more generic "snps,dwxgmac"
> > compatible. The platform code checks this to decide if it is a GMAC or
> > GMAC4 compatible IP core.
> > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
> > ---
> >   arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 9 ++++++---
> >   1 file changed, 6 insertions(+), 3 deletions(-)
> > diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > index 4ccfebfd9d322..d0c139f03541e 100644
> > --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> > @@ -536,7 +536,8 @@ qspi: spi@108d2000 {
> >     		gmac0: ethernet@10810000 {
> >   			compatible = "altr,socfpga-stmmac-agilex5",
> > -				     "snps,dwxgmac-2.10";
> > +				     "snps,dwxgmac-2.10",
> > +				     "snps,dwxgmac";
> >   			reg = <0x10810000 0x3500>;
> >   			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
> >   			interrupt-names = "macirq";
> > @@ -649,7 +650,8 @@ queue7 {
> >     		gmac1: ethernet@10820000 {
> >   			compatible = "altr,socfpga-stmmac-agilex5",
> > -				     "snps,dwxgmac-2.10";
> > +				     "snps,dwxgmac-2.10",
> > +				     "snps,dwxgmac";
> >   			reg = <0x10820000 0x3500>;
> >   			interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
> >   			interrupt-names = "macirq";
> > @@ -762,7 +764,8 @@ queue7 {
> >     		gmac2: ethernet@10830000 {
> >   			compatible = "altr,socfpga-stmmac-agilex5",
> > -				     "snps,dwxgmac-2.10";
> > +				     "snps,dwxgmac-2.10",
> > +				     "snps,dwxgmac";
> >   			reg = <0x10830000 0x3500>;
> >   			interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
> >   			interrupt-names = "macirq";
> > 
> 
> I just sent a patch for this yesterday:
> 
> https://lore.kernel.org/all/20251023214012.283600-1-dinguyen@kernel.org/
>

ah, I missed that, than this patch is unneccessary.

> I'll make sure to include you on future submissions.
> 
> I didn't add it to the bindings document though.
>

As I always get complains from dt-check bot, I remembered to add it ;)


Best regards,
Steffen

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