Ciao Antonio
On 10/23/25 15:27, Antonio Borneo wrote:
> On board stm32mp257f-ev1, the propagation delay between eth1/eth2
> and the external PHY requires a compensation to guarantee that no
> packet get lost in all the working conditions.
>
> Add I/O synchronization properties in pinctrl on all the RGMII
> data pins, activating re-sampling on both edges of the clock.
>
> Co-developed-by: Christophe Roullier <christophe.roullier@foss.st.com>
> Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
> ---
> arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> index e0d102eb61769..c34cd33cd855f 100644
> --- a/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi
> @@ -38,6 +38,7 @@ pins1 {
> bias-disable;
> drive-push-pull;
> slew-rate = <3>;
> + st,io-sync = "data on both edges";
> };
> pins2 {
> pinmux = <STM32_PINMUX('H', 9, AF10)>, /* ETH_RGMII_CLK125 */
> @@ -53,6 +54,7 @@ pins3 {
> <STM32_PINMUX('H', 13, AF10)>, /* ETH_RGMII_RXD3 */
> <STM32_PINMUX('A', 11, AF10)>; /* ETH_RGMII_RX_CTL */
> bias-disable;
> + st,io-sync = "data on both edges";
> };
> pins4 {
> pinmux = <STM32_PINMUX('A', 14, AF10)>; /* ETH_RGMII_RX_CLK */
> @@ -142,6 +144,7 @@ pins1 {
> bias-disable;
> drive-push-pull;
> slew-rate = <3>;
> + st,io-sync = "data on both edges";
> };
> pins2 {
> pinmux = <STM32_PINMUX('F', 8, AF10)>, /* ETH_RGMII_CLK125 */
> @@ -164,6 +167,7 @@ pins4 {
> <STM32_PINMUX('C', 11, AF10)>, /* ETH_RGMII_RXD3 */
> <STM32_PINMUX('C', 3, AF10)>; /* ETH_RGMII_RX_CTL */
> bias-disable;
> + st,io-sync = "data on both edges";
> };
> pins5 {
> pinmux = <STM32_PINMUX('F', 6, AF10)>; /* ETH_RGMII_RX_CLK */
Applied on stm32-next.
Thanks.
Alex