[PATCH v9 0/4] Add support for Andes Qilai SoC PCIe controller

Randolph Lin posted 4 patches 1 month, 3 weeks ago
.../bindings/pci/andestech,qilai-pcie.yaml    |  86 ++++++++
MAINTAINERS                                   |   7 +
arch/riscv/boot/dts/andes/qilai.dtsi          | 106 ++++++++++
drivers/pci/controller/dwc/Kconfig            |  13 ++
drivers/pci/controller/dwc/Makefile           |   1 +
drivers/pci/controller/dwc/pcie-andes-qilai.c | 198 ++++++++++++++++++
6 files changed, 411 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml
create mode 100644 drivers/pci/controller/dwc/pcie-andes-qilai.c
[PATCH v9 0/4] Add support for Andes Qilai SoC PCIe controller
Posted by Randolph Lin 1 month, 3 weeks ago
Add support for Andes Qilai SoC PCIe controller

These patches introduce driver support for the PCIe controller on the
Andes Qilai SoC.

Signed-off-by: Randolph Lin <randolph@andestech.com>

---
Changes in v9:
- Drop the patch that adjusts the number of OB/IB windows.
- Made minor adjustments based on the reviewer's suggestions.

Changes in v8:
- Fix the compile error reported by the kernel test robot.

Changes in v7:
- Remove unnecessary nodes and property in DTS bindings

Changes in v6:
- Fix typo in the logic for adjusting the number of OB/IB windows

Changes in v5:
- Add support to adjust the number of OB/IB windows in the glue driver.
- Fix the number of OB windows in the Qilai PCIe driver.
- Remove meaningless properties from the device tree.
- Made minor adjustments based on the reviewer's suggestions.

Changes in v4:
- Add .post_init callback for enabling IOCP cache.  
- Sort by vender name in Kconfig 
- Using PROBE_PREFER_ASYNCHRONOUS as default probe type.
- Made minor adjustments based on the reviewer's suggestions.

Changes in v3:
- Remove outbound ATU address range validation callback and logic.
- Add logic to skip failed outbound iATU configuration and continue.
- Using PROBE_PREFER_ASYNCHRONOUS as default probe type.
- Made minor adjustments based on the reviewer's suggestions.

Changes in v2:
- Remove the patch that adds the dma-ranges property to the SoC node.
- Add dma-ranges to the PCIe parent node bus node.
- Refactor and rename outbound ATU address range validation callback and logic.
- Use parent_bus_offset instead of cpu_addr_fixup().
- Using PROBE_DEFAULT_STRATEGY as default probe type.
- Made minor adjustments based on the reviewer's suggestions.

Randolph Lin (4):
  dt-bindings: PCI: Add Andes QiLai PCIe support
  riscv: dts: andes: Add PCIe node into the QiLai SoC
  PCI: andes: Add Andes QiLai SoC PCIe host driver support
  MAINTAINERS: Add maintainers for Andes QiLai PCIe driver

 .../bindings/pci/andestech,qilai-pcie.yaml    |  86 ++++++++
 MAINTAINERS                                   |   7 +
 arch/riscv/boot/dts/andes/qilai.dtsi          | 106 ++++++++++
 drivers/pci/controller/dwc/Kconfig            |  13 ++
 drivers/pci/controller/dwc/Makefile           |   1 +
 drivers/pci/controller/dwc/pcie-andes-qilai.c | 198 ++++++++++++++++++
 6 files changed, 411 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml
 create mode 100644 drivers/pci/controller/dwc/pcie-andes-qilai.c

-- 
2.34.1
Re: [PATCH v9 0/4] Add support for Andes Qilai SoC PCIe controller
Posted by Bjorn Helgaas 1 month, 3 weeks ago
On Thu, Oct 23, 2025 at 08:09:29PM +0800, Randolph Lin wrote:
> Add support for Andes Qilai SoC PCIe controller
> 
> These patches introduce driver support for the PCIe controller on the
> Andes Qilai SoC.

> Randolph Lin (4):
>   dt-bindings: PCI: Add Andes QiLai PCIe support
>   riscv: dts: andes: Add PCIe node into the QiLai SoC
>   PCI: andes: Add Andes QiLai SoC PCIe host driver support
>   MAINTAINERS: Add maintainers for Andes QiLai PCIe driver

I wonder if you should use "qilai" instead of "andes" as the tag,
e.g.,

  riscv: dts: qilai: Add ...
  PCI: qilai: Add Andes QiLai ...

in case Andes ever makes another SoC with a different product name.

No need to repost for this; just let us know your thoughts.

>  .../bindings/pci/andestech,qilai-pcie.yaml    |  86 ++++++++
>  MAINTAINERS                                   |   7 +
>  arch/riscv/boot/dts/andes/qilai.dtsi          | 106 ++++++++++
>  drivers/pci/controller/dwc/Kconfig            |  13 ++
>  drivers/pci/controller/dwc/Makefile           |   1 +
>  drivers/pci/controller/dwc/pcie-andes-qilai.c | 198 ++++++++++++++++++
>  6 files changed, 411 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pci/andestech,qilai-pcie.yaml
>  create mode 100644 drivers/pci/controller/dwc/pcie-andes-qilai.c
> 
> -- 
> 2.34.1
>