[PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller

dongxuyang@eswincomputing.com posted 2 patches 3 months, 2 weeks ago
There is a newer version of this series
.../bindings/clock/eswin,eic7700-clock.yaml   |   46 +
drivers/clk/Kconfig                           |    1 +
drivers/clk/Makefile                          |    1 +
drivers/clk/eswin/Kconfig                     |   15 +
drivers/clk/eswin/Makefile                    |    8 +
drivers/clk/eswin/clk-eic7700.c               | 1033 +++++++++++++++++
drivers/clk/eswin/clk-eic7700.h               |  122 ++
drivers/clk/eswin/clk.c                       |  481 ++++++++
drivers/clk/eswin/clk.h                       |  256 ++++
.../dt-bindings/clock/eswin,eic7700-clock.h   |  280 +++++
10 files changed, 2243 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
create mode 100644 drivers/clk/eswin/Kconfig
create mode 100644 drivers/clk/eswin/Makefile
create mode 100644 drivers/clk/eswin/clk-eic7700.c
create mode 100644 drivers/clk/eswin/clk-eic7700.h
create mode 100644 drivers/clk/eswin/clk.c
create mode 100644 drivers/clk/eswin/clk.h
create mode 100644 include/dt-bindings/clock/eswin,eic7700-clock.h
[PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by dongxuyang@eswincomputing.com 3 months, 2 weeks ago
From: Xuyang Dong <dongxuyang@eswincomputing.com>

Updates:
  Changes in v7:
  - Updated YAML file
    - Added "Acked-by: Conor Dooley <conor.dooley@microchip.com>" for bindings.
  - Updated driver file
    - Added description for clk of eswin_calc_pll().
    - Added macro EIC7700_MUX_TBL to manage mux clock-tree.
    - Added eswin_clk_register_mux_tbl() to register mux clocks with
      discontinuous parent indexes.

  - Link to v6: https://lore.kernel.org/all/20251009092029.140-1-dongxuyang@eswincomputing.com/

  Changes in v6:
  - Removed config option patch dependency from cover letter, because the patch
    was applied.
  - Updated YAML file
    - Added an oscillator as the clock input, named xtal24m.
    - Added clocks property.
  - Updated driver file
    - Replaced fixed_rate_clk_xtal_24m with xtal24m.
    - Dropped fixed_rate_clk_xtal_24m from driver. Because clock xtal24m was
      registered by fixed-clock as oscillator.

  - Link to v5: https://lore.kernel.org/all/20250923084637.1223-1-dongxuyang@eswincomputing.com/

  Changes in v5:
  - Removed vendor prefix patch dependency from cover letter, because the patch
    was applied.
  - Updated YAML file
    - Placed the required after all properties.
    - Removed patternProperties. Also removed compatible of eswin,pll-clock,
      eswin,mux-clock, eswin,divider-clock and eswin,gate-clock as we have moved
      clock tree from DTS to Linux driver.
    - Removed the clock tree from DTS. Used clock-controller to manage all
      clock. Removed all child nodes in clock-controller.
    - Removed '#address-cells' and '#size-cells' properties, because the clock
      controller did not need to define these properties.
    - Removed eic7700-clocks.dtsi.
    - Added dt-bindings header for clock IDs. Because used the IDs to register
      clocks.
  - Updated driver file
    - Modified the commit for clock driver. Dropped indentation in commit.
    - Removed CLK_OF_DECLARE(). Used *clk_hw_register* to register clocks. Used
      devm_of_clk_add_hw_provider.
    - Dropped singletons.
    - Checked the value right after obtaining it.
    - Removed the definitions of macro frequency in clk.h like CLK_FREQ_24M.
    - Modified description of help in Kconfig.
    - Added COMPILE_TEST. Added COMMON_CLK_ESWIN for clk.o. And added
      "select COMMON_CLK_ESWIN" for clk-eic7700.c. Without COMMON_CLK_EIC7700,
      clk.c could not be compiled.
    - Used .determined_rate.
    - Added macro definitions of EIC7700_DIV, EIC7700_FIXED, EIC7700_FACTOR,
      EIC7700_MUX and EIC7700_PLL to manage clock tree.
    - Added clk-eic7700.h to place eic7700 SoC clock registers.
    - Removed refdiv_val and postdiv1_val from clk_pll_recalc_rate(). Because
      these values were unused.

  - Link to v4: https://lore.kernel.org/all/20250815093539.975-1-dongxuyang@eswincomputing.com/

  Changes in v4:
  - Updated YAML file
    - Changed name from cpu-default-frequency to cpu-default-freq-hz.
    - Dropped $ref of cpu-default-frequency.
    - Added cpu-default-frequency for required.
    - Removed cpu-default-frequency in updated file, because there was no
      need to add cpu-default-frequency.
    - Moved DIVIDER to DIV.
    - Arranged the IDs in order.
    - Dropped EIC7700_NR_CLKS.
    - Removed dt-bindings eswin,eic7700-clock.h. Because IDs was not used,
      and used clock device nodes.
    - According to the updated driver codes, the YAML has been updated.
  - Updated driver file
    - Remove undocumented parameters "cpu_no_boost_1_6ghz" and
      "cpu-default-frequency".
    - Modified the comment and used the correct Linux coding style.
    - Removed codes of voltage, because it was not the clock driver.
    - Updated the formula of clock frequency calculation. Removed the logic
      that only used register selection.
    - Used CLK_OF_DECLARE() to register clocks. Registered pll-clock,
      mux-clock, divider-clock, and gate-clock in clk-eic7700.c.
      The specific implementation of clock registration was in clk.c.
    - Added eic7700-clocks.dtsi.
    - Moved device information to DTS. Put all clocks' node in the
      eic7700-clocks.dtsi.

  - Link to v3: https://lore.kernel.org/all/20250624103212.287-1-dongxuyang@eswincomputing.com/

  Changes in v3:
  - Update example, drop child node and add '#clock-cells' to the parent
    node.
  - Change parent node from sys-crg to clock-controller for this yaml.
  - Drop "syscon", "simple-mfd" to clear warnings/errors by using "make
    dt_binding_check". And these are not necessary.
  - Add "cpu-default-frequency" definition in yaml for "undocumented ABI".
  - Drop Reviewed-by, this is misunderstanding. We have not received such
    an email.
  - Link to v2: https://lore.kernel.org/all/20250523090747.1830-1-dongxuyang@eswincomputing.com/

  Changes in v2:
  - Update example, drop child node.
  - Clear warnings/errors for using "make dt_binding_check".
  - Change to the correct format.
  - Drop some non-stanard code.
  - Use dev_err_probe() in probe functions.
  - Link to v1: https://lore.kernel.org/all/20250514002233.187-1-dongxuyang@eswincomputing.com/

Xuyang Dong (2):
  dt-bindings: clock: eswin: Documentation for eic7700 SoC
  clock: eswin: Add eic7700 clock driver

 .../bindings/clock/eswin,eic7700-clock.yaml   |   46 +
 drivers/clk/Kconfig                           |    1 +
 drivers/clk/Makefile                          |    1 +
 drivers/clk/eswin/Kconfig                     |   15 +
 drivers/clk/eswin/Makefile                    |    8 +
 drivers/clk/eswin/clk-eic7700.c               | 1033 +++++++++++++++++
 drivers/clk/eswin/clk-eic7700.h               |  122 ++
 drivers/clk/eswin/clk.c                       |  481 ++++++++
 drivers/clk/eswin/clk.h                       |  256 ++++
 .../dt-bindings/clock/eswin,eic7700-clock.h   |  280 +++++
 10 files changed, 2243 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
 create mode 100644 drivers/clk/eswin/Kconfig
 create mode 100644 drivers/clk/eswin/Makefile
 create mode 100644 drivers/clk/eswin/clk-eic7700.c
 create mode 100644 drivers/clk/eswin/clk-eic7700.h
 create mode 100644 drivers/clk/eswin/clk.c
 create mode 100644 drivers/clk/eswin/clk.h
 create mode 100644 include/dt-bindings/clock/eswin,eic7700-clock.h

--
2.43.0
Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Xuyang Dong 3 months ago
Hi all,

  Gentle ping. Looking forward to your reply. Thank you very much!

Best regards,
Xuyang Dong

> 
> Updates:
>   Changes in v7:
>   - Updated YAML file
>     - Added "Acked-by: Conor Dooley <conor.dooley@microchip.com>" for bindings.
>   - Updated driver file
>     - Added description for clk of eswin_calc_pll().
>     - Added macro EIC7700_MUX_TBL to manage mux clock-tree.
>     - Added eswin_clk_register_mux_tbl() to register mux clocks with
>       discontinuous parent indexes.
> 
>   - Link to v6: https://lore.kernel.org/all/20251009092029.140-1-dongxuyang@eswincomputing.com/
> 
>   Changes in v6:
>   - Removed config option patch dependency from cover letter, because the patch
>     was applied.
>   - Updated YAML file
>     - Added an oscillator as the clock input, named xtal24m.
>     - Added clocks property.
>   - Updated driver file
>     - Replaced fixed_rate_clk_xtal_24m with xtal24m.
>     - Dropped fixed_rate_clk_xtal_24m from driver. Because clock xtal24m was
>       registered by fixed-clock as oscillator.
> 
>   - Link to v5: https://lore.kernel.org/all/20250923084637.1223-1-dongxuyang@eswincomputing.com/
> 
>   Changes in v5:
>   - Removed vendor prefix patch dependency from cover letter, because the patch
>     was applied.
>   - Updated YAML file
>     - Placed the required after all properties.
>     - Removed patternProperties. Also removed compatible of eswin,pll-clock,
>       eswin,mux-clock, eswin,divider-clock and eswin,gate-clock as we have moved
>       clock tree from DTS to Linux driver.
>     - Removed the clock tree from DTS. Used clock-controller to manage all
>       clock. Removed all child nodes in clock-controller.
>     - Removed '#address-cells' and '#size-cells' properties, because the clock
>       controller did not need to define these properties.
>     - Removed eic7700-clocks.dtsi.
>     - Added dt-bindings header for clock IDs. Because used the IDs to register
>       clocks.
>   - Updated driver file
>     - Modified the commit for clock driver. Dropped indentation in commit.
>     - Removed CLK_OF_DECLARE(). Used *clk_hw_register* to register clocks. Used
>       devm_of_clk_add_hw_provider.
>     - Dropped singletons.
>     - Checked the value right after obtaining it.
>     - Removed the definitions of macro frequency in clk.h like CLK_FREQ_24M.
>     - Modified description of help in Kconfig.
>     - Added COMPILE_TEST. Added COMMON_CLK_ESWIN for clk.o. And added
>       "select COMMON_CLK_ESWIN" for clk-eic7700.c. Without COMMON_CLK_EIC7700,
>       clk.c could not be compiled.
>     - Used .determined_rate.
>     - Added macro definitions of EIC7700_DIV, EIC7700_FIXED, EIC7700_FACTOR,
>       EIC7700_MUX and EIC7700_PLL to manage clock tree.
>     - Added clk-eic7700.h to place eic7700 SoC clock registers.
>     - Removed refdiv_val and postdiv1_val from clk_pll_recalc_rate(). Because
>       these values were unused.
> 
>   - Link to v4: https://lore.kernel.org/all/20250815093539.975-1-dongxuyang@eswincomputing.com/
> 
>   Changes in v4:
>   - Updated YAML file
>     - Changed name from cpu-default-frequency to cpu-default-freq-hz.
>     - Dropped $ref of cpu-default-frequency.
>     - Added cpu-default-frequency for required.
>     - Removed cpu-default-frequency in updated file, because there was no
>       need to add cpu-default-frequency.
>     - Moved DIVIDER to DIV.
>     - Arranged the IDs in order.
>     - Dropped EIC7700_NR_CLKS.
>     - Removed dt-bindings eswin,eic7700-clock.h. Because IDs was not used,
>       and used clock device nodes.
>     - According to the updated driver codes, the YAML has been updated.
>   - Updated driver file
>     - Remove undocumented parameters "cpu_no_boost_1_6ghz" and
>       "cpu-default-frequency".
>     - Modified the comment and used the correct Linux coding style.
>     - Removed codes of voltage, because it was not the clock driver.
>     - Updated the formula of clock frequency calculation. Removed the logic
>       that only used register selection.
>     - Used CLK_OF_DECLARE() to register clocks. Registered pll-clock,
>       mux-clock, divider-clock, and gate-clock in clk-eic7700.c.
>       The specific implementation of clock registration was in clk.c.
>     - Added eic7700-clocks.dtsi.
>     - Moved device information to DTS. Put all clocks' node in the
>       eic7700-clocks.dtsi.
> 
>   - Link to v3: https://lore.kernel.org/all/20250624103212.287-1-dongxuyang@eswincomputing.com/
> 
>   Changes in v3:
>   - Update example, drop child node and add '#clock-cells' to the parent
>     node.
>   - Change parent node from sys-crg to clock-controller for this yaml.
>   - Drop "syscon", "simple-mfd" to clear warnings/errors by using "make
>     dt_binding_check". And these are not necessary.
>   - Add "cpu-default-frequency" definition in yaml for "undocumented ABI".
>   - Drop Reviewed-by, this is misunderstanding. We have not received such
>     an email.
>   - Link to v2: https://lore.kernel.org/all/20250523090747.1830-1-dongxuyang@eswincomputing.com/
> 
>   Changes in v2:
>   - Update example, drop child node.
>   - Clear warnings/errors for using "make dt_binding_check".
>   - Change to the correct format.
>   - Drop some non-stanard code.
>   - Use dev_err_probe() in probe functions.
>   - Link to v1: https://lore.kernel.org/all/20250514002233.187-1-dongxuyang@eswincomputing.com/
> 
> Xuyang Dong (2):
>   dt-bindings: clock: eswin: Documentation for eic7700 SoC
>   clock: eswin: Add eic7700 clock driver
> 
>  .../bindings/clock/eswin,eic7700-clock.yaml   |   46 +
>  drivers/clk/Kconfig                           |    1 +
>  drivers/clk/Makefile                          |    1 +
>  drivers/clk/eswin/Kconfig                     |   15 +
>  drivers/clk/eswin/Makefile                    |    8 +
>  drivers/clk/eswin/clk-eic7700.c               | 1033 +++++++++++++++++
>  drivers/clk/eswin/clk-eic7700.h               |  122 ++
>  drivers/clk/eswin/clk.c                       |  481 ++++++++
>  drivers/clk/eswin/clk.h                       |  256 ++++
>  .../dt-bindings/clock/eswin,eic7700-clock.h   |  280 +++++
>  10 files changed, 2243 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/eswin,eic7700-clock.yaml
>  create mode 100644 drivers/clk/eswin/Kconfig
>  create mode 100644 drivers/clk/eswin/Makefile
>  create mode 100644 drivers/clk/eswin/clk-eic7700.c
>  create mode 100644 drivers/clk/eswin/clk-eic7700.h
>  create mode 100644 drivers/clk/eswin/clk.c
>  create mode 100644 drivers/clk/eswin/clk.h
>  create mode 100644 include/dt-bindings/clock/eswin,eic7700-clock.h
> 
> --
> 2.43.0
Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Krzysztof Kozlowski 3 months ago
On 06/11/2025 08:57, Xuyang Dong wrote:
> Hi all,
> 
>   Gentle ping. Looking forward to your reply. Thank you very much!

Please do not top post.

You did not add any maintainers of these drivers, so I would not put it
high on our priority list.  Ask yourself - why would community
maintainer like to take unmaintained driver? So the community maintainer
would maintain, right? To add him more work? If that is the case, isn't
better not to take the driver? You see where I am getting at?

Also, I don't see any involvement in reviews from eswin. The only
reviews here where from DT maintainers, Troy and Brian (I hope I did not
miss anyone), so again - you just put all the effort on us and then ping
us...

Best regards,
Krzysztof
Re: Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Xuyang Dong 3 months ago
> > 
> >   Gentle ping. Looking forward to your reply. Thank you very much!
> 
> Please do not top post.
> 
> You did not add any maintainers of these drivers, so I would not put it
> high on our priority list.  Ask yourself - why would community
> maintainer like to take unmaintained driver? So the community maintainer
> would maintain, right? To add him more work? If that is the case, isn't
> better not to take the driver? You see where I am getting at?
> 
> Also, I don't see any involvement in reviews from eswin. The only
> reviews here where from DT maintainers, Troy and Brian (I hope I did not
> miss anyone), so again - you just put all the effort on us and then ping
> us...
> 

Hello Krzysztof Brian Troy,

Would you kindly review the updated v7 patches at your earliest convenience?

Thanks to Krzysztof for your reply.

These patches have already undergone review within our internal team. 
The reason for adding eswin maintainers to the mailing list is to ensure 
that these colleagues can promptly receive community feedback and stay 
informed of the discussions.

Regards,
Xuyang Dong
Re: Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Troy Mitchell 3 months ago
Hi Xuyang,

On Fri, Nov 07, 2025 at 02:20:23PM +0800, Xuyang Dong wrote:
> > > 
> > >   Gentle ping. Looking forward to your reply. Thank you very much!
> > 
> > Please do not top post.
> > 
> > You did not add any maintainers of these drivers, so I would not put it
> > high on our priority list. 
Do you have any plans to become a maintainer? If so, this patch might get
reviewed with higher priority. I think that's what Krzysztof meant.

                              - Troy
> >
> > Ask yourself - why would community
> > maintainer like to take unmaintained driver? So the community maintainer
> > would maintain, right? To add him more work? If that is the case, isn't
> > better not to take the driver? You see where I am getting at?
> > 
> > Also, I don't see any involvement in reviews from eswin. The only
> > reviews here where from DT maintainers, Troy and Brian (I hope I did not
> > miss anyone), so again - you just put all the effort on us and then ping
> > us...
> > 
> 
> Hello Krzysztof Brian Troy,
> 
> Would you kindly review the updated v7 patches at your earliest convenience?
> 
> Thanks to Krzysztof for your reply.
> 
> These patches have already undergone review within our internal team. 
> The reason for adding eswin maintainers to the mailing list is to ensure 
> that these colleagues can promptly receive community feedback and stay 
> informed of the discussions.
> 
> Regards,
> Xuyang Dong
Re: Re: Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Xuyang Dong 3 months ago
> > > > 
> > > >   Gentle ping. Looking forward to your reply. Thank you very much!
> > > 
> > > Please do not top post.
> > > 
> > > You did not add any maintainers of these drivers, so I would not put it
> > > high on our priority list. 
> Do you have any plans to become a maintainer? If so, this patch might get
> reviewed with higher priority. I think that's what Krzysztof meant.
> 
>                               - Troy

Hello Troy,

Yes, I plan to become the maintainer for this driver. I will add my 
maintainer information to the MAINTAINERS file in the next patch series. 
Would that be acceptable?

Regards,
Xuyang Dong
Re: Re: Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Troy Mitchell 3 months ago
On Fri, Nov 07, 2025 at 05:02:06PM +0800, Xuyang Dong wrote:
> > > > > 
> > > > >   Gentle ping. Looking forward to your reply. Thank you very much!
> > > > 
> > > > Please do not top post.
> > > > 
> > > > You did not add any maintainers of these drivers, so I would not put it
> > > > high on our priority list. 
> > Do you have any plans to become a maintainer? If so, this patch might get
> > reviewed with higher priority. I think that's what Krzysztof meant.
> > 
> >                               - Troy
> 
> Hello Troy,
> 
> Yes, I plan to become the maintainer for this driver. I will add my 
> maintainer information to the MAINTAINERS file in the next patch series. 
> Would that be acceptable?
I think yes.

And if you send next version, please dont't send to this email:
troy.mitchell@linux.dev instead of linux.spacemit.com.

Thanks.

                              - Troy
> 
> Regards,
> Xuyang Dong
Re: Re: Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Troy Mitchell 3 months ago
On Fri, Nov 07, 2025 at 06:05:22PM +0800, Troy Mitchell wrote:
> On Fri, Nov 07, 2025 at 05:02:06PM +0800, Xuyang Dong wrote:
> > > > > > 
> > > > > >   Gentle ping. Looking forward to your reply. Thank you very much!
> > > > > 
> > > > > Please do not top post.
> > > > > 
> > > > > You did not add any maintainers of these drivers, so I would not put it
> > > > > high on our priority list. 
> > > Do you have any plans to become a maintainer? If so, this patch might get
> > > reviewed with higher priority. I think that's what Krzysztof meant.
> > > 
> > >                               - Troy
> > 
> > Hello Troy,
> > 
> > Yes, I plan to become the maintainer for this driver. I will add my 
> > maintainer information to the MAINTAINERS file in the next patch series. 
> > Would that be acceptable?
> I think yes.
> 
> And if you send next version, please dont't send to this email:
                                       ^^^^ no "don't" here..
> troy.mitchell@linux.dev instead of linux.spacemit.com.
> 
> Thanks.
> 
>                               - Troy
> > 
> > Regards,
> > Xuyang Dong
Re: [PATCH v7 0/2] Add driver support for ESWIN eic700 SoC clock controller
Posted by Krzysztof Kozlowski 3 months ago
On 07/11/2025 07:20, Xuyang Dong wrote:
>>>
>>>   Gentle ping. Looking forward to your reply. Thank you very much!
>>
>> Please do not top post.
>>
>> You did not add any maintainers of these drivers, so I would not put it
>> high on our priority list.  Ask yourself - why would community
>> maintainer like to take unmaintained driver? So the community maintainer
>> would maintain, right? To add him more work? If that is the case, isn't
>> better not to take the driver? You see where I am getting at?
>>
>> Also, I don't see any involvement in reviews from eswin. The only
>> reviews here where from DT maintainers, Troy and Brian (I hope I did not
>> miss anyone), so again - you just put all the effort on us and then ping
>> us...
>>
> 
> Hello Krzysztof Brian Troy,
> 
> Would you kindly review the updated v7 patches at your earliest convenience?
> 
> Thanks to Krzysztof for your reply.
> 
> These patches have already undergone review within our internal team. 
> The reason for adding eswin maintainers to the mailing list is to ensure 
> that these colleagues can promptly receive community feedback and stay 
> informed of the discussions.

Please really, really think through my first paragraph. It seems you did
not get the point, but understanding the point is essential for all your
future (and this) upstreaming efforts.

Best regards,
Krzysztof