Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
with a set of changes required for that.

---
Changes in v2:
- vi_sensor gated through csus
- TEGRA30_CLK_CLK_MAX moved to clk-tegra30
- adjusted commit titles and messages
- clk_register_clkdev dropped from pad clock registration
- removed tegra30-vi/vip and used tegra20 fallback
- added separate csi schema for tegra20-csi and tegra30-csi
- fixet number of VI channels
- adjusted tegra_vi_out naming
- fixed yuv_input_format to main_input_format
- MIPI calibration refsctored for Tegra114+ and added support for
  pre-Tegra114 to use CSI as a MIPI calibration device
- switched ENOMEM to EBUSY
- added check into tegra_channel_get_remote_csi_subdev
- moved avdd-dsi-csi-supply into CSI
- next_fs_sp_idx > next_fs_sp_value
- removed host1x_syncpt_incr from framecounted syncpoint
- csi subdev request moved before frame cycle

Changes in v3:
- tegra20 and tegra30 csi schema merged
- removed unneeded properties and requirements from schema
- improved vendor specific properties description
- added tegra20 csus parent mux
- improved commit descriptions
- redesigned MIPI-calibration to expose less SoC related data into header
- commit "staging: media: tegra-video: csi: add support for SoCs with integrated
  MIPI calibration" dropped as unneeded
- improved tegra_channel_get_remote_device_subdev logic
- avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
- software syncpoint counters switched to direct reading
- adjusted planar formats offset calculation

Changes in v4:
- removed ifdefs from tegra_mipi_driver
- document Tegra132 MIPI calibration device
- switched to use BIT macro in tegra114-mipi
- pinctrl changes moved to a separate patch
- ERESTARTSYS workaround preserved for now
- tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider
- reworked bytesperline and sizeimage calculaion

Changes in v5:
- dropped patch 1/24 of v4 since it was picked to pinctrl tree
- added reasoning for tegra132 comaptible into commit desctiption
- moved clocks into common section in tegra20-csi schema
- added note regarding ERESTARTSYS
---

Svyatoslav Ryhel (23):
  clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
    Tegra114
  dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
  clk: tegra30: add CSI pad clock gates
  dt-bindings: display: tegra: document Tegra30 VI and VIP
  staging: media: tegra-video: expand VI and VIP support to Tegra30
  staging: media: tegra-video: vi: adjust get_selection op check
  staging: media: tegra-video: vi: add flip controls only if no source
    controls are provided
  staging: media: tegra-video: csi: move CSI helpers to header
  gpu: host1x: convert MIPI to use operation function pointers
  dt-bindings: display: tegra: document Tegra132 MIPI calibration device
  staging: media: tegra-video: vi: improve logic of source requesting
  staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
    CSI
  arm64: tegra: move avdd-dsi-csi-supply into CSI node
  staging: media: tegra-video: tegra20: set correct maximum width and
    height
  staging: media: tegra-video: tegra20: add support for second output of
    VI
  staging: media: tegra-video: tegra20: adjust format align calculations
  staging: media: tegra-video: tegra20: set VI HW revision
  staging: media: tegra-video: tegra20: increase maximum VI clock
    frequency
  staging: media: tegra-video: tegra20: expand format support with
    RAW8/10 and YUV422/YUV420p 1X16
  staging: media: tegra-video: tegra20: adjust luma buffer stride
  dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
  ARM: tegra: add CSI nodes for Tegra20 and Tegra30
  staging: media: tegra-video: add CSI support for Tegra20 and Tegra30

 .../display/tegra/nvidia,tegra114-mipi.yaml   |   1 +
 .../display/tegra/nvidia,tegra20-csi.yaml     | 138 +++
 .../display/tegra/nvidia,tegra20-vi.yaml      |  19 +-
 .../display/tegra/nvidia,tegra20-vip.yaml     |   9 +-
 arch/arm/boot/dts/nvidia/tegra20.dtsi         |  19 +-
 arch/arm/boot/dts/nvidia/tegra30.dtsi         |  24 +-
 .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi |   4 +-
 .../boot/dts/nvidia/tegra210-p3450-0000.dts   |   4 +-
 drivers/clk/tegra/clk-tegra114.c              |   7 +-
 drivers/clk/tegra/clk-tegra20.c               |  20 +-
 drivers/clk/tegra/clk-tegra30.c               |  21 +-
 drivers/gpu/drm/tegra/dsi.c                   |   1 +
 drivers/gpu/host1x/Makefile                   |   1 +
 drivers/gpu/host1x/mipi.c                     | 525 ++---------
 drivers/gpu/host1x/tegra114-mipi.c            | 483 +++++++++++
 drivers/staging/media/tegra-video/Makefile    |   1 +
 drivers/staging/media/tegra-video/csi.c       |  70 +-
 drivers/staging/media/tegra-video/csi.h       |  16 +
 drivers/staging/media/tegra-video/tegra20.c   | 820 +++++++++++++++---
 drivers/staging/media/tegra-video/vi.c        |  56 +-
 drivers/staging/media/tegra-video/vi.h        |   6 +-
 drivers/staging/media/tegra-video/video.c     |   8 +-
 drivers/staging/media/tegra-video/vip.c       |   4 +-
 include/dt-bindings/clock/tegra30-car.h       |   3 +-
 include/linux/host1x.h                        |  10 -
 include/linux/tegra-mipi-cal.h                |  57 ++
 26 files changed, 1657 insertions(+), 670 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
 create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
 create mode 100644 include/linux/tegra-mipi-cal.h

-- 
2.48.1

Hi Svyatoslav,

On 22/10/2025 16:20, Svyatoslav Ryhel wrote:
> Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
> with a set of changes required for that.

Other than patch 06/23 that looked iffy (although the original code was iffy as
already), for which I posted a review, this series looks almost ready.

Should the clk patches be merged together with the media patches? Or can those
go in via the clk subsystem? If it is the latter, then I'll need an Acked-by from the
clk subsystem maintainer.

Regarding the bindings: all except 21/23 are Acked.

I have one question regarding testing: in the past I tested this driver with a
Jetson TX1 devkit and a camera sensor. One of the main reasons this driver is still
in staging is that I never got that to work reliably: after 10-30 minutes it would
lose sync and streaming would stop.

Unfortunately I never had the time to dig deeper into that.

So have you tested this with a camera sensor? And if so, does it stream reliably?
I.e. just let it stream for 24 hours and see if that works.

If it is reliable for you, then I think this driver should be moved to drivers/media.

Regards,

	Hans

> 
> ---
> Changes in v2:
> - vi_sensor gated through csus
> - TEGRA30_CLK_CLK_MAX moved to clk-tegra30
> - adjusted commit titles and messages
> - clk_register_clkdev dropped from pad clock registration
> - removed tegra30-vi/vip and used tegra20 fallback
> - added separate csi schema for tegra20-csi and tegra30-csi
> - fixet number of VI channels
> - adjusted tegra_vi_out naming
> - fixed yuv_input_format to main_input_format
> - MIPI calibration refsctored for Tegra114+ and added support for
>   pre-Tegra114 to use CSI as a MIPI calibration device
> - switched ENOMEM to EBUSY
> - added check into tegra_channel_get_remote_csi_subdev
> - moved avdd-dsi-csi-supply into CSI
> - next_fs_sp_idx > next_fs_sp_value
> - removed host1x_syncpt_incr from framecounted syncpoint
> - csi subdev request moved before frame cycle
> 
> Changes in v3:
> - tegra20 and tegra30 csi schema merged
> - removed unneeded properties and requirements from schema
> - improved vendor specific properties description
> - added tegra20 csus parent mux
> - improved commit descriptions
> - redesigned MIPI-calibration to expose less SoC related data into header
> - commit "staging: media: tegra-video: csi: add support for SoCs with integrated
>   MIPI calibration" dropped as unneeded
> - improved tegra_channel_get_remote_device_subdev logic
> - avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
> - software syncpoint counters switched to direct reading
> - adjusted planar formats offset calculation
> 
> Changes in v4:
> - removed ifdefs from tegra_mipi_driver
> - document Tegra132 MIPI calibration device
> - switched to use BIT macro in tegra114-mipi
> - pinctrl changes moved to a separate patch
> - ERESTARTSYS workaround preserved for now
> - tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider
> - reworked bytesperline and sizeimage calculaion
> 
> Changes in v5:
> - dropped patch 1/24 of v4 since it was picked to pinctrl tree
> - added reasoning for tegra132 comaptible into commit desctiption
> - moved clocks into common section in tegra20-csi schema
> - added note regarding ERESTARTSYS
> ---
> 
> Svyatoslav Ryhel (23):
>   clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
>     Tegra114
>   dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
>   clk: tegra30: add CSI pad clock gates
>   dt-bindings: display: tegra: document Tegra30 VI and VIP
>   staging: media: tegra-video: expand VI and VIP support to Tegra30
>   staging: media: tegra-video: vi: adjust get_selection op check
>   staging: media: tegra-video: vi: add flip controls only if no source
>     controls are provided
>   staging: media: tegra-video: csi: move CSI helpers to header
>   gpu: host1x: convert MIPI to use operation function pointers
>   dt-bindings: display: tegra: document Tegra132 MIPI calibration device
>   staging: media: tegra-video: vi: improve logic of source requesting
>   staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
>     CSI
>   arm64: tegra: move avdd-dsi-csi-supply into CSI node
>   staging: media: tegra-video: tegra20: set correct maximum width and
>     height
>   staging: media: tegra-video: tegra20: add support for second output of
>     VI
>   staging: media: tegra-video: tegra20: adjust format align calculations
>   staging: media: tegra-video: tegra20: set VI HW revision
>   staging: media: tegra-video: tegra20: increase maximum VI clock
>     frequency
>   staging: media: tegra-video: tegra20: expand format support with
>     RAW8/10 and YUV422/YUV420p 1X16
>   staging: media: tegra-video: tegra20: adjust luma buffer stride
>   dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
>   ARM: tegra: add CSI nodes for Tegra20 and Tegra30
>   staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
> 
>  .../display/tegra/nvidia,tegra114-mipi.yaml   |   1 +
>  .../display/tegra/nvidia,tegra20-csi.yaml     | 138 +++
>  .../display/tegra/nvidia,tegra20-vi.yaml      |  19 +-
>  .../display/tegra/nvidia,tegra20-vip.yaml     |   9 +-
>  arch/arm/boot/dts/nvidia/tegra20.dtsi         |  19 +-
>  arch/arm/boot/dts/nvidia/tegra30.dtsi         |  24 +-
>  .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi |   4 +-
>  .../boot/dts/nvidia/tegra210-p3450-0000.dts   |   4 +-
>  drivers/clk/tegra/clk-tegra114.c              |   7 +-
>  drivers/clk/tegra/clk-tegra20.c               |  20 +-
>  drivers/clk/tegra/clk-tegra30.c               |  21 +-
>  drivers/gpu/drm/tegra/dsi.c                   |   1 +
>  drivers/gpu/host1x/Makefile                   |   1 +
>  drivers/gpu/host1x/mipi.c                     | 525 ++---------
>  drivers/gpu/host1x/tegra114-mipi.c            | 483 +++++++++++
>  drivers/staging/media/tegra-video/Makefile    |   1 +
>  drivers/staging/media/tegra-video/csi.c       |  70 +-
>  drivers/staging/media/tegra-video/csi.h       |  16 +
>  drivers/staging/media/tegra-video/tegra20.c   | 820 +++++++++++++++---
>  drivers/staging/media/tegra-video/vi.c        |  56 +-
>  drivers/staging/media/tegra-video/vi.h        |   6 +-
>  drivers/staging/media/tegra-video/video.c     |   8 +-
>  drivers/staging/media/tegra-video/vip.c       |   4 +-
>  include/dt-bindings/clock/tegra30-car.h       |   3 +-
>  include/linux/host1x.h                        |  10 -
>  include/linux/tegra-mipi-cal.h                |  57 ++
>  26 files changed, 1657 insertions(+), 670 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
>  create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
>  create mode 100644 include/linux/tegra-mipi-cal.h
>

пн, 27 жовт. 2025 р. о 18:08 Hans Verkuil <hverkuil+cisco@kernel.org> пише:
>
> Hi Svyatoslav,
>
> On 22/10/2025 16:20, Svyatoslav Ryhel wrote:
> > Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
> > with a set of changes required for that.
>
> Other than patch 06/23 that looked iffy (although the original code was iffy as
> already), for which I posted a review, this series looks almost ready.

06/23 addresses issue I have encountered while testing with mt9m114 I
will add detailed explanation later in the 06/23 commit discussion.

>
> Should the clk patches be merged together with the media patches? Or can those
> go in via the clk subsystem? If it is the latter, then I'll need an Acked-by from the
> clk subsystem maintainer.
>

I suppose this should be discussed between staging and clk subsystem
maintainers I am fine with any conclusion.

> Regarding the bindings: all except 21/23 are Acked.

Maybe you did not notice, but 21/23 has reviewed-by from Rob Herring.

>
> I have one question regarding testing: in the past I tested this driver with a
> Jetson TX1 devkit and a camera sensor. One of the main reasons this driver is still
> in staging is that I never got that to work reliably: after 10-30 minutes it would
> lose sync and streaming would stop.
>
> Unfortunately I never had the time to dig deeper into that.
>
> So have you tested this with a camera sensor? And if so, does it stream reliably?
> I.e. just let it stream for 24 hours and see if that works.
>
> If it is reliable for you, then I think this driver should be moved to drivers/media.

Streaming works but I did not tested for such prolonged periods of
time. Scope of this patchset is bringing CSI support for
Tegra20/Tegra30, extended testing and move to media can be done in
followup.

>
> Regards,
>
>         Hans
>
> >
> > ---
> > Changes in v2:
> > - vi_sensor gated through csus
> > - TEGRA30_CLK_CLK_MAX moved to clk-tegra30
> > - adjusted commit titles and messages
> > - clk_register_clkdev dropped from pad clock registration
> > - removed tegra30-vi/vip and used tegra20 fallback
> > - added separate csi schema for tegra20-csi and tegra30-csi
> > - fixet number of VI channels
> > - adjusted tegra_vi_out naming
> > - fixed yuv_input_format to main_input_format
> > - MIPI calibration refsctored for Tegra114+ and added support for
> >   pre-Tegra114 to use CSI as a MIPI calibration device
> > - switched ENOMEM to EBUSY
> > - added check into tegra_channel_get_remote_csi_subdev
> > - moved avdd-dsi-csi-supply into CSI
> > - next_fs_sp_idx > next_fs_sp_value
> > - removed host1x_syncpt_incr from framecounted syncpoint
> > - csi subdev request moved before frame cycle
> >
> > Changes in v3:
> > - tegra20 and tegra30 csi schema merged
> > - removed unneeded properties and requirements from schema
> > - improved vendor specific properties description
> > - added tegra20 csus parent mux
> > - improved commit descriptions
> > - redesigned MIPI-calibration to expose less SoC related data into header
> > - commit "staging: media: tegra-video: csi: add support for SoCs with integrated
> >   MIPI calibration" dropped as unneeded
> > - improved tegra_channel_get_remote_device_subdev logic
> > - avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
> > - software syncpoint counters switched to direct reading
> > - adjusted planar formats offset calculation
> >
> > Changes in v4:
> > - removed ifdefs from tegra_mipi_driver
> > - document Tegra132 MIPI calibration device
> > - switched to use BIT macro in tegra114-mipi
> > - pinctrl changes moved to a separate patch
> > - ERESTARTSYS workaround preserved for now
> > - tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider
> > - reworked bytesperline and sizeimage calculaion
> >
> > Changes in v5:
> > - dropped patch 1/24 of v4 since it was picked to pinctrl tree
> > - added reasoning for tegra132 comaptible into commit desctiption
> > - moved clocks into common section in tegra20-csi schema
> > - added note regarding ERESTARTSYS
> > ---
> >
> > Svyatoslav Ryhel (23):
> >   clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
> >     Tegra114
> >   dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
> >   clk: tegra30: add CSI pad clock gates
> >   dt-bindings: display: tegra: document Tegra30 VI and VIP
> >   staging: media: tegra-video: expand VI and VIP support to Tegra30
> >   staging: media: tegra-video: vi: adjust get_selection op check
> >   staging: media: tegra-video: vi: add flip controls only if no source
> >     controls are provided
> >   staging: media: tegra-video: csi: move CSI helpers to header
> >   gpu: host1x: convert MIPI to use operation function pointers
> >   dt-bindings: display: tegra: document Tegra132 MIPI calibration device
> >   staging: media: tegra-video: vi: improve logic of source requesting
> >   staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
> >     CSI
> >   arm64: tegra: move avdd-dsi-csi-supply into CSI node
> >   staging: media: tegra-video: tegra20: set correct maximum width and
> >     height
> >   staging: media: tegra-video: tegra20: add support for second output of
> >     VI
> >   staging: media: tegra-video: tegra20: adjust format align calculations
> >   staging: media: tegra-video: tegra20: set VI HW revision
> >   staging: media: tegra-video: tegra20: increase maximum VI clock
> >     frequency
> >   staging: media: tegra-video: tegra20: expand format support with
> >     RAW8/10 and YUV422/YUV420p 1X16
> >   staging: media: tegra-video: tegra20: adjust luma buffer stride
> >   dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
> >   ARM: tegra: add CSI nodes for Tegra20 and Tegra30
> >   staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
> >
> >  .../display/tegra/nvidia,tegra114-mipi.yaml   |   1 +
> >  .../display/tegra/nvidia,tegra20-csi.yaml     | 138 +++
> >  .../display/tegra/nvidia,tegra20-vi.yaml      |  19 +-
> >  .../display/tegra/nvidia,tegra20-vip.yaml     |   9 +-
> >  arch/arm/boot/dts/nvidia/tegra20.dtsi         |  19 +-
> >  arch/arm/boot/dts/nvidia/tegra30.dtsi         |  24 +-
> >  .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi |   4 +-
> >  .../boot/dts/nvidia/tegra210-p3450-0000.dts   |   4 +-
> >  drivers/clk/tegra/clk-tegra114.c              |   7 +-
> >  drivers/clk/tegra/clk-tegra20.c               |  20 +-
> >  drivers/clk/tegra/clk-tegra30.c               |  21 +-
> >  drivers/gpu/drm/tegra/dsi.c                   |   1 +
> >  drivers/gpu/host1x/Makefile                   |   1 +
> >  drivers/gpu/host1x/mipi.c                     | 525 ++---------
> >  drivers/gpu/host1x/tegra114-mipi.c            | 483 +++++++++++
> >  drivers/staging/media/tegra-video/Makefile    |   1 +
> >  drivers/staging/media/tegra-video/csi.c       |  70 +-
> >  drivers/staging/media/tegra-video/csi.h       |  16 +
> >  drivers/staging/media/tegra-video/tegra20.c   | 820 +++++++++++++++---
> >  drivers/staging/media/tegra-video/vi.c        |  56 +-
> >  drivers/staging/media/tegra-video/vi.h        |   6 +-
> >  drivers/staging/media/tegra-video/video.c     |   8 +-
> >  drivers/staging/media/tegra-video/vip.c       |   4 +-
> >  include/dt-bindings/clock/tegra30-car.h       |   3 +-
> >  include/linux/host1x.h                        |  10 -
> >  include/linux/tegra-mipi-cal.h                |  57 ++
> >  26 files changed, 1657 insertions(+), 670 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> >  create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
> >  create mode 100644 include/linux/tegra-mipi-cal.h
> >
>

On 27/10/2025 17:26, Svyatoslav Ryhel wrote:
> пн, 27 жовт. 2025 р. о 18:08 Hans Verkuil <hverkuil+cisco@kernel.org> пише:
>>
>> Hi Svyatoslav,
>>
>> On 22/10/2025 16:20, Svyatoslav Ryhel wrote:
>>> Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
>>> with a set of changes required for that.
>>
>> Other than patch 06/23 that looked iffy (although the original code was iffy as
>> already), for which I posted a review, this series looks almost ready.
> 
> 06/23 addresses issue I have encountered while testing with mt9m114 I
> will add detailed explanation later in the 06/23 commit discussion.
> 
>>
>> Should the clk patches be merged together with the media patches? Or can those
>> go in via the clk subsystem? If it is the latter, then I'll need an Acked-by from the
>> clk subsystem maintainer.
>>
> 
> I suppose this should be discussed between staging and clk subsystem
> maintainers I am fine with any conclusion.
> 
>> Regarding the bindings: all except 21/23 are Acked.
> 
> Maybe you did not notice, but 21/23 has reviewed-by from Rob Herring.

Ah yes, Rob replied. Good.

> 
>>
>> I have one question regarding testing: in the past I tested this driver with a
>> Jetson TX1 devkit and a camera sensor. One of the main reasons this driver is still
>> in staging is that I never got that to work reliably: after 10-30 minutes it would
>> lose sync and streaming would stop.
>>
>> Unfortunately I never had the time to dig deeper into that.
>>
>> So have you tested this with a camera sensor? And if so, does it stream reliably?
>> I.e. just let it stream for 24 hours and see if that works.
>>
>> If it is reliable for you, then I think this driver should be moved to drivers/media.
> 
> Streaming works but I did not tested for such prolonged periods of
> time. Scope of this patchset is bringing CSI support for
> Tegra20/Tegra30, extended testing and move to media can be done in
> followup.

I'd really appreciate it if you can do a duration test. Perhaps start streaming on
Friday and let it run for the weekend?

Regards,

	Hans

> 
>>
>> Regards,
>>
>>         Hans
>>
>>>
>>> ---
>>> Changes in v2:
>>> - vi_sensor gated through csus
>>> - TEGRA30_CLK_CLK_MAX moved to clk-tegra30
>>> - adjusted commit titles and messages
>>> - clk_register_clkdev dropped from pad clock registration
>>> - removed tegra30-vi/vip and used tegra20 fallback
>>> - added separate csi schema for tegra20-csi and tegra30-csi
>>> - fixet number of VI channels
>>> - adjusted tegra_vi_out naming
>>> - fixed yuv_input_format to main_input_format
>>> - MIPI calibration refsctored for Tegra114+ and added support for
>>>   pre-Tegra114 to use CSI as a MIPI calibration device
>>> - switched ENOMEM to EBUSY
>>> - added check into tegra_channel_get_remote_csi_subdev
>>> - moved avdd-dsi-csi-supply into CSI
>>> - next_fs_sp_idx > next_fs_sp_value
>>> - removed host1x_syncpt_incr from framecounted syncpoint
>>> - csi subdev request moved before frame cycle
>>>
>>> Changes in v3:
>>> - tegra20 and tegra30 csi schema merged
>>> - removed unneeded properties and requirements from schema
>>> - improved vendor specific properties description
>>> - added tegra20 csus parent mux
>>> - improved commit descriptions
>>> - redesigned MIPI-calibration to expose less SoC related data into header
>>> - commit "staging: media: tegra-video: csi: add support for SoCs with integrated
>>>   MIPI calibration" dropped as unneeded
>>> - improved tegra_channel_get_remote_device_subdev logic
>>> - avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
>>> - software syncpoint counters switched to direct reading
>>> - adjusted planar formats offset calculation
>>>
>>> Changes in v4:
>>> - removed ifdefs from tegra_mipi_driver
>>> - document Tegra132 MIPI calibration device
>>> - switched to use BIT macro in tegra114-mipi
>>> - pinctrl changes moved to a separate patch
>>> - ERESTARTSYS workaround preserved for now
>>> - tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider
>>> - reworked bytesperline and sizeimage calculaion
>>>
>>> Changes in v5:
>>> - dropped patch 1/24 of v4 since it was picked to pinctrl tree
>>> - added reasoning for tegra132 comaptible into commit desctiption
>>> - moved clocks into common section in tegra20-csi schema
>>> - added note regarding ERESTARTSYS
>>> ---
>>>
>>> Svyatoslav Ryhel (23):
>>>   clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
>>>     Tegra114
>>>   dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
>>>   clk: tegra30: add CSI pad clock gates
>>>   dt-bindings: display: tegra: document Tegra30 VI and VIP
>>>   staging: media: tegra-video: expand VI and VIP support to Tegra30
>>>   staging: media: tegra-video: vi: adjust get_selection op check
>>>   staging: media: tegra-video: vi: add flip controls only if no source
>>>     controls are provided
>>>   staging: media: tegra-video: csi: move CSI helpers to header
>>>   gpu: host1x: convert MIPI to use operation function pointers
>>>   dt-bindings: display: tegra: document Tegra132 MIPI calibration device
>>>   staging: media: tegra-video: vi: improve logic of source requesting
>>>   staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
>>>     CSI
>>>   arm64: tegra: move avdd-dsi-csi-supply into CSI node
>>>   staging: media: tegra-video: tegra20: set correct maximum width and
>>>     height
>>>   staging: media: tegra-video: tegra20: add support for second output of
>>>     VI
>>>   staging: media: tegra-video: tegra20: adjust format align calculations
>>>   staging: media: tegra-video: tegra20: set VI HW revision
>>>   staging: media: tegra-video: tegra20: increase maximum VI clock
>>>     frequency
>>>   staging: media: tegra-video: tegra20: expand format support with
>>>     RAW8/10 and YUV422/YUV420p 1X16
>>>   staging: media: tegra-video: tegra20: adjust luma buffer stride
>>>   dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
>>>   ARM: tegra: add CSI nodes for Tegra20 and Tegra30
>>>   staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
>>>
>>>  .../display/tegra/nvidia,tegra114-mipi.yaml   |   1 +
>>>  .../display/tegra/nvidia,tegra20-csi.yaml     | 138 +++
>>>  .../display/tegra/nvidia,tegra20-vi.yaml      |  19 +-
>>>  .../display/tegra/nvidia,tegra20-vip.yaml     |   9 +-
>>>  arch/arm/boot/dts/nvidia/tegra20.dtsi         |  19 +-
>>>  arch/arm/boot/dts/nvidia/tegra30.dtsi         |  24 +-
>>>  .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi |   4 +-
>>>  .../boot/dts/nvidia/tegra210-p3450-0000.dts   |   4 +-
>>>  drivers/clk/tegra/clk-tegra114.c              |   7 +-
>>>  drivers/clk/tegra/clk-tegra20.c               |  20 +-
>>>  drivers/clk/tegra/clk-tegra30.c               |  21 +-
>>>  drivers/gpu/drm/tegra/dsi.c                   |   1 +
>>>  drivers/gpu/host1x/Makefile                   |   1 +
>>>  drivers/gpu/host1x/mipi.c                     | 525 ++---------
>>>  drivers/gpu/host1x/tegra114-mipi.c            | 483 +++++++++++
>>>  drivers/staging/media/tegra-video/Makefile    |   1 +
>>>  drivers/staging/media/tegra-video/csi.c       |  70 +-
>>>  drivers/staging/media/tegra-video/csi.h       |  16 +
>>>  drivers/staging/media/tegra-video/tegra20.c   | 820 +++++++++++++++---
>>>  drivers/staging/media/tegra-video/vi.c        |  56 +-
>>>  drivers/staging/media/tegra-video/vi.h        |   6 +-
>>>  drivers/staging/media/tegra-video/video.c     |   8 +-
>>>  drivers/staging/media/tegra-video/vip.c       |   4 +-
>>>  include/dt-bindings/clock/tegra30-car.h       |   3 +-
>>>  include/linux/host1x.h                        |  10 -
>>>  include/linux/tegra-mipi-cal.h                |  57 ++
>>>  26 files changed, 1657 insertions(+), 670 deletions(-)
>>>  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
>>>  create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
>>>  create mode 100644 include/linux/tegra-mipi-cal.h
>>>
>>

пн, 27 жовт. 2025 р. о 18:30 Hans Verkuil <hverkuil+cisco@kernel.org> пише:
>
> On 27/10/2025 17:26, Svyatoslav Ryhel wrote:
> > пн, 27 жовт. 2025 р. о 18:08 Hans Verkuil <hverkuil+cisco@kernel.org> пише:
> >>
> >> Hi Svyatoslav,
> >>
> >> On 22/10/2025 16:20, Svyatoslav Ryhel wrote:
> >>> Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
> >>> with a set of changes required for that.
> >>
> >> Other than patch 06/23 that looked iffy (although the original code was iffy as
> >> already), for which I posted a review, this series looks almost ready.
> >
> > 06/23 addresses issue I have encountered while testing with mt9m114 I
> > will add detailed explanation later in the 06/23 commit discussion.
> >
> >>
> >> Should the clk patches be merged together with the media patches? Or can those
> >> go in via the clk subsystem? If it is the latter, then I'll need an Acked-by from the
> >> clk subsystem maintainer.
> >>
> >
> > I suppose this should be discussed between staging and clk subsystem
> > maintainers I am fine with any conclusion.
> >
> >> Regarding the bindings: all except 21/23 are Acked.
> >
> > Maybe you did not notice, but 21/23 has reviewed-by from Rob Herring.
>
> Ah yes, Rob replied. Good.
>
> >
> >>
> >> I have one question regarding testing: in the past I tested this driver with a
> >> Jetson TX1 devkit and a camera sensor. One of the main reasons this driver is still
> >> in staging is that I never got that to work reliably: after 10-30 minutes it would
> >> lose sync and streaming would stop.
> >>
> >> Unfortunately I never had the time to dig deeper into that.
> >>
> >> So have you tested this with a camera sensor? And if so, does it stream reliably?
> >> I.e. just let it stream for 24 hours and see if that works.
> >>
> >> If it is reliable for you, then I think this driver should be moved to drivers/media.
> >
> > Streaming works but I did not tested for such prolonged periods of
> > time. Scope of this patchset is bringing CSI support for
> > Tegra20/Tegra30, extended testing and move to media can be done in
> > followup.
>
> I'd really appreciate it if you can do a duration test. Perhaps start streaming on
> Friday and let it run for the weekend?

With all do respect this will not happen any time soon.

> Regards,
>
>         Hans
>
> >
> >>
> >> Regards,
> >>
> >>         Hans
> >>
> >>>
> >>> ---
> >>> Changes in v2:
> >>> - vi_sensor gated through csus
> >>> - TEGRA30_CLK_CLK_MAX moved to clk-tegra30
> >>> - adjusted commit titles and messages
> >>> - clk_register_clkdev dropped from pad clock registration
> >>> - removed tegra30-vi/vip and used tegra20 fallback
> >>> - added separate csi schema for tegra20-csi and tegra30-csi
> >>> - fixet number of VI channels
> >>> - adjusted tegra_vi_out naming
> >>> - fixed yuv_input_format to main_input_format
> >>> - MIPI calibration refsctored for Tegra114+ and added support for
> >>>   pre-Tegra114 to use CSI as a MIPI calibration device
> >>> - switched ENOMEM to EBUSY
> >>> - added check into tegra_channel_get_remote_csi_subdev
> >>> - moved avdd-dsi-csi-supply into CSI
> >>> - next_fs_sp_idx > next_fs_sp_value
> >>> - removed host1x_syncpt_incr from framecounted syncpoint
> >>> - csi subdev request moved before frame cycle
> >>>
> >>> Changes in v3:
> >>> - tegra20 and tegra30 csi schema merged
> >>> - removed unneeded properties and requirements from schema
> >>> - improved vendor specific properties description
> >>> - added tegra20 csus parent mux
> >>> - improved commit descriptions
> >>> - redesigned MIPI-calibration to expose less SoC related data into header
> >>> - commit "staging: media: tegra-video: csi: add support for SoCs with integrated
> >>>   MIPI calibration" dropped as unneeded
> >>> - improved tegra_channel_get_remote_device_subdev logic
> >>> - avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
> >>> - software syncpoint counters switched to direct reading
> >>> - adjusted planar formats offset calculation
> >>>
> >>> Changes in v4:
> >>> - removed ifdefs from tegra_mipi_driver
> >>> - document Tegra132 MIPI calibration device
> >>> - switched to use BIT macro in tegra114-mipi
> >>> - pinctrl changes moved to a separate patch
> >>> - ERESTARTSYS workaround preserved for now
> >>> - tegra_mipi_add_provider replaced with devm_tegra_mipi_add_provider
> >>> - reworked bytesperline and sizeimage calculaion
> >>>
> >>> Changes in v5:
> >>> - dropped patch 1/24 of v4 since it was picked to pinctrl tree
> >>> - added reasoning for tegra132 comaptible into commit desctiption
> >>> - moved clocks into common section in tegra20-csi schema
> >>> - added note regarding ERESTARTSYS
> >>> ---
> >>>
> >>> Svyatoslav Ryhel (23):
> >>>   clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
> >>>     Tegra114
> >>>   dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
> >>>   clk: tegra30: add CSI pad clock gates
> >>>   dt-bindings: display: tegra: document Tegra30 VI and VIP
> >>>   staging: media: tegra-video: expand VI and VIP support to Tegra30
> >>>   staging: media: tegra-video: vi: adjust get_selection op check
> >>>   staging: media: tegra-video: vi: add flip controls only if no source
> >>>     controls are provided
> >>>   staging: media: tegra-video: csi: move CSI helpers to header
> >>>   gpu: host1x: convert MIPI to use operation function pointers
> >>>   dt-bindings: display: tegra: document Tegra132 MIPI calibration device
> >>>   staging: media: tegra-video: vi: improve logic of source requesting
> >>>   staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
> >>>     CSI
> >>>   arm64: tegra: move avdd-dsi-csi-supply into CSI node
> >>>   staging: media: tegra-video: tegra20: set correct maximum width and
> >>>     height
> >>>   staging: media: tegra-video: tegra20: add support for second output of
> >>>     VI
> >>>   staging: media: tegra-video: tegra20: adjust format align calculations
> >>>   staging: media: tegra-video: tegra20: set VI HW revision
> >>>   staging: media: tegra-video: tegra20: increase maximum VI clock
> >>>     frequency
> >>>   staging: media: tegra-video: tegra20: expand format support with
> >>>     RAW8/10 and YUV422/YUV420p 1X16
> >>>   staging: media: tegra-video: tegra20: adjust luma buffer stride
> >>>   dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
> >>>   ARM: tegra: add CSI nodes for Tegra20 and Tegra30
> >>>   staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
> >>>
> >>>  .../display/tegra/nvidia,tegra114-mipi.yaml   |   1 +
> >>>  .../display/tegra/nvidia,tegra20-csi.yaml     | 138 +++
> >>>  .../display/tegra/nvidia,tegra20-vi.yaml      |  19 +-
> >>>  .../display/tegra/nvidia,tegra20-vip.yaml     |   9 +-
> >>>  arch/arm/boot/dts/nvidia/tegra20.dtsi         |  19 +-
> >>>  arch/arm/boot/dts/nvidia/tegra30.dtsi         |  24 +-
> >>>  .../arm64/boot/dts/nvidia/tegra210-p2597.dtsi |   4 +-
> >>>  .../boot/dts/nvidia/tegra210-p3450-0000.dts   |   4 +-
> >>>  drivers/clk/tegra/clk-tegra114.c              |   7 +-
> >>>  drivers/clk/tegra/clk-tegra20.c               |  20 +-
> >>>  drivers/clk/tegra/clk-tegra30.c               |  21 +-
> >>>  drivers/gpu/drm/tegra/dsi.c                   |   1 +
> >>>  drivers/gpu/host1x/Makefile                   |   1 +
> >>>  drivers/gpu/host1x/mipi.c                     | 525 ++---------
> >>>  drivers/gpu/host1x/tegra114-mipi.c            | 483 +++++++++++
> >>>  drivers/staging/media/tegra-video/Makefile    |   1 +
> >>>  drivers/staging/media/tegra-video/csi.c       |  70 +-
> >>>  drivers/staging/media/tegra-video/csi.h       |  16 +
> >>>  drivers/staging/media/tegra-video/tegra20.c   | 820 +++++++++++++++---
> >>>  drivers/staging/media/tegra-video/vi.c        |  56 +-
> >>>  drivers/staging/media/tegra-video/vi.h        |   6 +-
> >>>  drivers/staging/media/tegra-video/video.c     |   8 +-
> >>>  drivers/staging/media/tegra-video/vip.c       |   4 +-
> >>>  include/dt-bindings/clock/tegra30-car.h       |   3 +-
> >>>  include/linux/host1x.h                        |  10 -
> >>>  include/linux/tegra-mipi-cal.h                |  57 ++
> >>>  26 files changed, 1657 insertions(+), 670 deletions(-)
> >>>  create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
> >>>  create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
> >>>  create mode 100644 include/linux/tegra-mipi-cal.h
> >>>
> >>
>

Hello Svyatoslav,

On Wed Oct 22, 2025 at 4:20 PM CEST, Svyatoslav Ryhel wrote:
> Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
> with a set of changes required for that.

Whole v5 series (including patches 21-23):
Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # tegra20, parallel camera

As you seem to have issues with sending a long series over e-mail, I may
suggest looking at b4 [0] for the future. It automates many boring and
repetitive tasks in handling a patch series, and also offers a way to send
e-mails when an SMTP server is problematic e.g. due to limitations in
e-mails per hour.

[0] https://b4.docs.kernel.org

Luca

--
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com