[PATCH 2/8] arm64: dts: imx8dxl-ss-conn: swap interrupts number of eqos

Frank Li posted 8 patches 3 months, 2 weeks ago
[PATCH 2/8] arm64: dts: imx8dxl-ss-conn: swap interrupts number of eqos
Posted by Frank Li 3 months, 2 weeks ago
Swap interrupt numbers of eqos because the below commit just swap
interrupt-names and missed swap interrupts also.

The driver (drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c) use
interrupt-names to get irq numbers.

Fixes: f29c19a6e488 ("arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names order")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
index a66ba6d0a8c05646320dc45e460662ab0ae2aa3b..da33a35c6d4660ebf0fa3f7afcf7f7a289c3c419 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
@@ -29,8 +29,8 @@ eqos: ethernet@5b050000 {
 		compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a";
 		reg = <0x5b050000 0x10000>;
 		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "macirq", "eth_wake_irq";
 		clocks = <&eqos_lpcg IMX_LPCG_CLK_4>,
 			 <&eqos_lpcg IMX_LPCG_CLK_6>,

-- 
2.34.1
Re: [PATCH 2/8] arm64: dts: imx8dxl-ss-conn: swap interrupts number of eqos
Posted by Alexander Dahl 3 months, 2 weeks ago
Hello Frank,

Am Wed, Oct 22, 2025 at 12:50:22PM -0400 schrieb Frank Li:
> Swap interrupt numbers of eqos because the below commit just swap
> interrupt-names and missed swap interrupts also.
> 
> The driver (drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c) use
> interrupt-names to get irq numbers.

This catched my eye, because we are using a SolidRun i.MX 8XLite
System-on-Module on a custom baseboard which uses that SoC.

I had problems with one CPU core stalling when doing network traffic
over the 'end1' interface, which is that eqos interface here.  All I
could see so far were an excessive number of hardware interrupts in
/proc/interrupts for end1.  With this patch this behaviour is gone, I
could not reproduce those lock-up anymore.  Thank you and FWIW:

Tested-by: Alexander Dahl <ada@thorsis.com>

Note: I applied this to v6.12.  The patch has a Fixes: tag, so I
assume it hits stable once it got merged without further action,
right?

Adding Josua Mayer to Cc because it might affect other users of that
SoM.  Josua, would it be possible to upstream the dts/dtsi files for
that SoM? O:-)

Greets
Alex

> 
> Fixes: f29c19a6e488 ("arm64: dts: imx8dxl-ss-conn: Fix Ethernet interrupt-names order")
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
> index a66ba6d0a8c05646320dc45e460662ab0ae2aa3b..da33a35c6d4660ebf0fa3f7afcf7f7a289c3c419 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi
> @@ -29,8 +29,8 @@ eqos: ethernet@5b050000 {
>  		compatible = "nxp,imx8dxl-dwmac-eqos", "snps,dwmac-5.10a";
>  		reg = <0x5b050000 0x10000>;
>  		interrupt-parent = <&gic>;
> -		interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
> -			     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
> +			     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
>  		interrupt-names = "macirq", "eth_wake_irq";
>  		clocks = <&eqos_lpcg IMX_LPCG_CLK_4>,
>  			 <&eqos_lpcg IMX_LPCG_CLK_6>,
> 
> -- 
> 2.34.1
> 
>