.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 57 +- drivers/mmc/host/sdhci-of-dwcmshc.c | 502 +++++++++++++++++- 2 files changed, 542 insertions(+), 17 deletions(-)
From: Huan He <hehuan1@eswincomputing.com>
Updates:
Changes in v5:
- Update snps,dwcmshc-sdhci.yaml
- Update description for eswin,hsp-sp-csr
- Fix eswin,hsp-sp-csr property structure to use nested items format
- Remove unnecessary '|' symbol from description field
- Wrap description lines to 80-chars
- Update sdhci-of-dwcmshc.c
- Remove inappropriate Reported-by and Closes tags, as the fixes are part
of this patch
- Fix error code return in eic7700_init() when syscon_node_to_regmap()
fails (return PTR_ERR(hsp_regmap))
- Remove unnecessary clock disable/enable operations when changing clock
rates
- Remove unnecessary parentheses around ~PHY_CNFG_RSTN_DEASSERT in
sdhci_eic7700_config_phy()
- Update misleading comments: change "SDIO specific" to "SD specific" in
tuning logic
- Fix multi-line comment format
- Link to v4: https://lore.kernel.org/all/20251011111039.533-1-hehuan1@eswincomputing.com/
Changes in v4:
- Update sdhci-of-dwcmshc.c
- Address the compile error from kernel test robot
- Remove duplicate implementation of dwcmshc_enable_card_clk()
- Add missing dwcmshc_disable_card_clk() function implementation
- Link to v3: https://lore.kernel.org/all/20251010093807.1579-1-hehuan1@eswincomputing.com/
Changes in v3:
- Update snps,dwcmshc-sdhci.yaml
- Delete clock-output-names, '#clock-cells' and eswin,syscrg-csr
- Update description for eswin,hsp-sp-csr
- Update drive-impedance-ohm
- Update the item of reset-names
- Update sdhci-of-dwcmshc.c
- Add descriptions for PHY registers
- Simplify clock management(remove custom clock provider, use
standard clk API)
- Replace magic numbers with GENMASK() or FIELD_PREP() macros
- Add comments explaining HSP stability assertion writes
- Adjust line wrapping to fit within 100-column
- Delete forward declarations by moving function definitions
- Rename variable is_sdio to is_sd
- Replace unclear macros with meaningful alternatives
- Link to v2: https://lore.kernel.org/all/20250912093451.125-1-hehuan1@eswincomputing.com/
Changes in v2:
- Delete the previous separate driver and yaml binding file
- Update snps,dwcmshc-sdhci.yaml to add support for Eswin EIC7700
- Add the new compautible string: "eswin,eic7700-dwcmshc"
- Add new properties: clock-output-names, '#clock-cells',
drive-impedance-ohm, eswin,hsp-sp-csr and eswin,syscrg-csr
- Add customized reset-names for EIC7700 platform
- Update sdhci-of-dwcmshc.c to add support for Eswin EIC7700
- Add a new struct eic7700_priv to hold Eswin-specific data,
including clock phases, register mappings, and drive
impedance configuration
- Implement EIC7700-specific sdhci_ops
- set_clock: support core clock configuration with phase delay
- reset: add PHY reset and configuration
- set_uhs_signaling: support HS400 DLL lock
- platform_execute_tuning: implement delay line tuning and phase
code adjustment
- Add initialization routine (eic7700_init)
- Integrate the new platform data and ops into the driver's match table
- Link to v1: https://lore.kernel.org/all/20250516091259.774-1-dongxuyang@eswincomputing.com/
Huan He (2):
dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700
mmc: sdhci-of-dwcmshc: Add support for Eswin EIC7700
.../bindings/mmc/snps,dwcmshc-sdhci.yaml | 57 +-
drivers/mmc/host/sdhci-of-dwcmshc.c | 502 +++++++++++++++++-
2 files changed, 542 insertions(+), 17 deletions(-)
--
2.25.1
On Sun, 19 Oct 2025 at 13:51, <hehuan1@eswincomputing.com> wrote: > > From: Huan He <hehuan1@eswincomputing.com> > > Updates: > > Changes in v5: > - Update snps,dwcmshc-sdhci.yaml > - Update description for eswin,hsp-sp-csr > - Fix eswin,hsp-sp-csr property structure to use nested items format > - Remove unnecessary '|' symbol from description field > - Wrap description lines to 80-chars > - Update sdhci-of-dwcmshc.c > - Remove inappropriate Reported-by and Closes tags, as the fixes are part > of this patch > - Fix error code return in eic7700_init() when syscon_node_to_regmap() > fails (return PTR_ERR(hsp_regmap)) > - Remove unnecessary clock disable/enable operations when changing clock > rates > - Remove unnecessary parentheses around ~PHY_CNFG_RSTN_DEASSERT in > sdhci_eic7700_config_phy() > - Update misleading comments: change "SDIO specific" to "SD specific" in > tuning logic > - Fix multi-line comment format > - Link to v4: https://lore.kernel.org/all/20251011111039.533-1-hehuan1@eswincomputing.com/ > > Changes in v4: > - Update sdhci-of-dwcmshc.c > - Address the compile error from kernel test robot > - Remove duplicate implementation of dwcmshc_enable_card_clk() > - Add missing dwcmshc_disable_card_clk() function implementation > - Link to v3: https://lore.kernel.org/all/20251010093807.1579-1-hehuan1@eswincomputing.com/ > > Changes in v3: > - Update snps,dwcmshc-sdhci.yaml > - Delete clock-output-names, '#clock-cells' and eswin,syscrg-csr > - Update description for eswin,hsp-sp-csr > - Update drive-impedance-ohm > - Update the item of reset-names > - Update sdhci-of-dwcmshc.c > - Add descriptions for PHY registers > - Simplify clock management(remove custom clock provider, use > standard clk API) > - Replace magic numbers with GENMASK() or FIELD_PREP() macros > - Add comments explaining HSP stability assertion writes > - Adjust line wrapping to fit within 100-column > - Delete forward declarations by moving function definitions > - Rename variable is_sdio to is_sd > - Replace unclear macros with meaningful alternatives > - Link to v2: https://lore.kernel.org/all/20250912093451.125-1-hehuan1@eswincomputing.com/ > > Changes in v2: > - Delete the previous separate driver and yaml binding file > - Update snps,dwcmshc-sdhci.yaml to add support for Eswin EIC7700 > - Add the new compautible string: "eswin,eic7700-dwcmshc" > - Add new properties: clock-output-names, '#clock-cells', > drive-impedance-ohm, eswin,hsp-sp-csr and eswin,syscrg-csr > - Add customized reset-names for EIC7700 platform > - Update sdhci-of-dwcmshc.c to add support for Eswin EIC7700 > - Add a new struct eic7700_priv to hold Eswin-specific data, > including clock phases, register mappings, and drive > impedance configuration > - Implement EIC7700-specific sdhci_ops > - set_clock: support core clock configuration with phase delay > - reset: add PHY reset and configuration > - set_uhs_signaling: support HS400 DLL lock > - platform_execute_tuning: implement delay line tuning and phase > code adjustment > - Add initialization routine (eic7700_init) > - Integrate the new platform data and ops into the driver's match table > - Link to v1: https://lore.kernel.org/all/20250516091259.774-1-dongxuyang@eswincomputing.com/ > > Huan He (2): > dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700 > mmc: sdhci-of-dwcmshc: Add support for Eswin EIC7700 > > .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 57 +- > drivers/mmc/host/sdhci-of-dwcmshc.c | 502 +++++++++++++++++- > 2 files changed, 542 insertions(+), 17 deletions(-) > > -- > 2.25.1 > The v5 series applied for next, thanks! Kind regards Uffe
> Updates: > > Changes in v5: > - Update snps,dwcmshc-sdhci.yaml > - Update description for eswin,hsp-sp-csr > - Fix eswin,hsp-sp-csr property structure to use nested items format > - Remove unnecessary '|' symbol from description field > - Wrap description lines to 80-chars > - Update sdhci-of-dwcmshc.c > - Remove inappropriate Reported-by and Closes tags, as the fixes are part > of this patch > - Fix error code return in eic7700_init() when syscon_node_to_regmap() > fails (return PTR_ERR(hsp_regmap)) > - Remove unnecessary clock disable/enable operations when changing clock > rates > - Remove unnecessary parentheses around ~PHY_CNFG_RSTN_DEASSERT in > sdhci_eic7700_config_phy() > - Update misleading comments: change "SDIO specific" to "SD specific" in > tuning logic > - Fix multi-line comment format > - Link to v4: https://lore.kernel.org/all/20251011111039.533-1-hehuan1@eswincomputing.com/ > > Changes in v4: > - Update sdhci-of-dwcmshc.c > - Address the compile error from kernel test robot > - Remove duplicate implementation of dwcmshc_enable_card_clk() > - Add missing dwcmshc_disable_card_clk() function implementation > - Link to v3: https://lore.kernel.org/all/20251010093807.1579-1-hehuan1@eswincomputing.com/ > > Changes in v3: > - Update snps,dwcmshc-sdhci.yaml > - Delete clock-output-names, '#clock-cells' and eswin,syscrg-csr > - Update description for eswin,hsp-sp-csr > - Update drive-impedance-ohm > - Update the item of reset-names > - Update sdhci-of-dwcmshc.c > - Add descriptions for PHY registers > - Simplify clock management(remove custom clock provider, use > standard clk API) > - Replace magic numbers with GENMASK() or FIELD_PREP() macros > - Add comments explaining HSP stability assertion writes > - Adjust line wrapping to fit within 100-column > - Delete forward declarations by moving function definitions > - Rename variable is_sdio to is_sd > - Replace unclear macros with meaningful alternatives > - Link to v2: https://lore.kernel.org/all/20250912093451.125-1-hehuan1@eswincomputing.com/ > > Changes in v2: > - Delete the previous separate driver and yaml binding file > - Update snps,dwcmshc-sdhci.yaml to add support for Eswin EIC7700 > - Add the new compautible string: "eswin,eic7700-dwcmshc" > - Add new properties: clock-output-names, '#clock-cells', > drive-impedance-ohm, eswin,hsp-sp-csr and eswin,syscrg-csr > - Add customized reset-names for EIC7700 platform > - Update sdhci-of-dwcmshc.c to add support for Eswin EIC7700 > - Add a new struct eic7700_priv to hold Eswin-specific data, > including clock phases, register mappings, and drive > impedance configuration > - Implement EIC7700-specific sdhci_ops > - set_clock: support core clock configuration with phase delay > - reset: add PHY reset and configuration > - set_uhs_signaling: support HS400 DLL lock > - platform_execute_tuning: implement delay line tuning and phase > code adjustment > - Add initialization routine (eic7700_init) > - Integrate the new platform data and ops into the driver's match table > - Link to v1: https://lore.kernel.org/all/20250516091259.774-1-dongxuyang@eswincomputing.com/ > > Huan He (2): > dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700 > mmc: sdhci-of-dwcmshc: Add support for Eswin EIC7700 > > .../bindings/mmc/snps,dwcmshc-sdhci.yaml | 57 +- > drivers/mmc/host/sdhci-of-dwcmshc.c | 502 +++++++++++++++++- > 2 files changed, 542 insertions(+), 17 deletions(-) > Hi Ulf, Rob, all, Thank you for the discussion and feedback. Regarding the dt_binding_check error previously reported for the eswin,hsp-sp-csr property in the eswin,eic7700-eth.yaml binding, we have submitted a fix patch that has now been applied: https://git.kernel.org/netdev/net-next/c/0567c84d683d Could you please review the mmc-related changes? Thanks in advance for your time and consideration. Best regards, Huan He
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