Bandwidth counters need to run continuously to correctly reflect the
bandwidth.
The value read may be lower than the previous value read in the case
of overflow and when the hardware is reset due to CPU hotplug.
Add struct mbwu_state to track the bandwidth counter to allow overflow
and power management to be handled.
Tested-by: Fenghua Yu <fenghuay@nvidia.com>
Signed-off-by: James Morse <james.morse@arm.com>
---
Changes since v2:
* Removed bogus 'if (!mbwu_state)' checks.
* Fixed __allocate_component_cfg() losing error return values.
* Moved variable definitions into the loop.
* Removed spurious lockdep assert from mpam_reset_component_cfg().
Changes since v1:
* Fixed lock/unlock typo.
---
drivers/resctrl/mpam_devices.c | 146 +++++++++++++++++++++++++++++++-
drivers/resctrl/mpam_internal.h | 23 +++++
2 files changed, 167 insertions(+), 2 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index fb5414c6b3eb..deb1dcc6f6b1 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -955,6 +955,7 @@ static void clean_msmon_ctl_val(u32 *cur_ctl)
static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
u32 flt_val)
{
+ struct msmon_mbwu_state *mbwu_state;
struct mpam_msc *msc = m->ris->vmsc->msc;
/*
@@ -973,20 +974,31 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val);
mpam_write_monsel_reg(msc, MBWU, 0);
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
+
+ mbwu_state = &m->ris->mbwu_state[m->ctx->mon];
+ mbwu_state->prev_val = 0;
+
break;
default:
return;
}
}
+static u64 mpam_msmon_overflow_val(struct mpam_msc_ris *ris)
+{
+ /* TODO: scaling, and long counters */
+ return GENMASK_ULL(30, 0);
+}
+
/* Call with MSC lock held */
static void __ris_msmon_read(void *arg)
{
- u64 now;
bool nrdy = false;
struct mon_read *m = arg;
+ u64 now, overflow_val = 0;
struct mon_cfg *ctx = m->ctx;
struct mpam_msc_ris *ris = m->ris;
+ struct msmon_mbwu_state *mbwu_state;
struct mpam_props *rprops = &ris->props;
struct mpam_msc *msc = m->ris->vmsc->msc;
u32 mon_sel, ctl_val, flt_val, cur_ctl, cur_flt;
@@ -1014,11 +1026,28 @@ static void __ris_msmon_read(void *arg)
now = mpam_read_monsel_reg(msc, CSU);
if (mpam_has_feature(mpam_feat_msmon_csu_hw_nrdy, rprops))
nrdy = now & MSMON___NRDY;
+ now = FIELD_GET(MSMON___VALUE, now);
break;
case mpam_feat_msmon_mbwu:
now = mpam_read_monsel_reg(msc, MBWU);
if (mpam_has_feature(mpam_feat_msmon_mbwu_hw_nrdy, rprops))
nrdy = now & MSMON___NRDY;
+ now = FIELD_GET(MSMON___VALUE, now);
+
+ if (nrdy)
+ break;
+
+ mbwu_state = &ris->mbwu_state[ctx->mon];
+
+ /* Add any pre-overflow value to the mbwu_state->val */
+ if (mbwu_state->prev_val > now)
+ overflow_val = mpam_msmon_overflow_val(ris) - mbwu_state->prev_val;
+
+ mbwu_state->prev_val = now;
+ mbwu_state->correction += overflow_val;
+
+ /* Include bandwidth consumed before the last hardware reset */
+ now += mbwu_state->correction;
break;
default:
m->err = -EINVAL;
@@ -1031,7 +1060,6 @@ static void __ris_msmon_read(void *arg)
return;
}
- now = FIELD_GET(MSMON___VALUE, now);
*m->val += now;
}
@@ -1250,6 +1278,67 @@ static int mpam_reprogram_ris(void *_arg)
return 0;
}
+/* Call with MSC lock held */
+static int mpam_restore_mbwu_state(void *_ris)
+{
+ int i;
+ struct mon_read mwbu_arg;
+ struct mpam_msc_ris *ris = _ris;
+
+ for (i = 0; i < ris->props.num_mbwu_mon; i++) {
+ if (ris->mbwu_state[i].enabled) {
+ mwbu_arg.ris = ris;
+ mwbu_arg.ctx = &ris->mbwu_state[i].cfg;
+ mwbu_arg.type = mpam_feat_msmon_mbwu;
+
+ __ris_msmon_read(&mwbu_arg);
+ }
+ }
+
+ return 0;
+}
+
+/* Call with MSC lock and held */
+static int mpam_save_mbwu_state(void *arg)
+{
+ int i;
+ u64 val;
+ struct mon_cfg *cfg;
+ u32 cur_flt, cur_ctl, mon_sel;
+ struct mpam_msc_ris *ris = arg;
+ struct msmon_mbwu_state *mbwu_state;
+ struct mpam_msc *msc = ris->vmsc->msc;
+
+ for (i = 0; i < ris->props.num_mbwu_mon; i++) {
+ mbwu_state = &ris->mbwu_state[i];
+ cfg = &mbwu_state->cfg;
+
+ if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
+ return -EIO;
+
+ mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, i) |
+ FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);
+ mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel);
+
+ cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT);
+ cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
+ mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0);
+
+ val = mpam_read_monsel_reg(msc, MBWU);
+ mpam_write_monsel_reg(msc, MBWU, 0);
+
+ cfg->mon = i;
+ cfg->pmg = FIELD_GET(MSMON_CFG_x_FLT_PMG, cur_flt);
+ cfg->match_pmg = FIELD_GET(MSMON_CFG_x_CTL_MATCH_PMG, cur_ctl);
+ cfg->partid = FIELD_GET(MSMON_CFG_x_FLT_PARTID, cur_flt);
+ mbwu_state->correction += val;
+ mbwu_state->enabled = FIELD_GET(MSMON_CFG_x_CTL_EN, cur_ctl);
+ mpam_mon_sel_unlock(msc);
+ }
+
+ return 0;
+}
+
static void mpam_init_reset_cfg(struct mpam_config *reset_cfg)
{
*reset_cfg = (struct mpam_config) {
@@ -1322,6 +1411,9 @@ static void mpam_reset_msc(struct mpam_msc *msc, bool online)
* for non-zero partid may be lost while the CPUs are offline.
*/
ris->in_reset_state = online;
+
+ if (mpam_is_enabled() && !online)
+ mpam_touch_msc(msc, &mpam_save_mbwu_state, ris);
}
}
@@ -1355,6 +1447,9 @@ static void mpam_reprogram_msc(struct mpam_msc *msc)
mpam_reprogram_ris_partid(ris, partid, cfg);
}
ris->in_reset_state = reset;
+
+ if (mpam_has_feature(mpam_feat_msmon_mbwu, &ris->props))
+ mpam_touch_msc(msc, &mpam_restore_mbwu_state, ris);
}
}
@@ -2096,7 +2191,22 @@ static void mpam_unregister_irqs(void)
static void __destroy_component_cfg(struct mpam_component *comp)
{
+ struct mpam_msc *msc;
+ struct mpam_vmsc *vmsc;
+ struct mpam_msc_ris *ris;
+
+ lockdep_assert_held(&mpam_list_lock);
+
add_to_garbage(comp->cfg);
+ list_for_each_entry(vmsc, &comp->vmsc, comp_list) {
+ msc = vmsc->msc;
+
+ if (mpam_mon_sel_lock(msc)) {
+ list_for_each_entry(ris, &vmsc->ris, vmsc_list)
+ add_to_garbage(ris->mbwu_state);
+ mpam_mon_sel_unlock(msc);
+ }
+ }
}
static void mpam_reset_component_cfg(struct mpam_component *comp)
@@ -2114,6 +2224,8 @@ static void mpam_reset_component_cfg(struct mpam_component *comp)
static int __allocate_component_cfg(struct mpam_component *comp)
{
+ struct mpam_vmsc *vmsc;
+
mpam_assert_partid_sizes_fixed();
if (comp->cfg)
@@ -2131,6 +2243,36 @@ static int __allocate_component_cfg(struct mpam_component *comp)
mpam_reset_component_cfg(comp);
+ list_for_each_entry(vmsc, &comp->vmsc, comp_list) {
+ struct mpam_msc *msc;
+ struct mpam_msc_ris *ris;
+ struct msmon_mbwu_state *mbwu_state;
+
+ if (!vmsc->props.num_mbwu_mon)
+ continue;
+
+ msc = vmsc->msc;
+ list_for_each_entry(ris, &vmsc->ris, vmsc_list) {
+ if (!ris->props.num_mbwu_mon)
+ continue;
+
+ mbwu_state = kcalloc(ris->props.num_mbwu_mon,
+ sizeof(*ris->mbwu_state),
+ GFP_KERNEL);
+ if (!mbwu_state) {
+ __destroy_component_cfg(comp);
+ return -ENOMEM;
+ }
+
+ init_garbage(&mbwu_state[0].garbage);
+
+ if (mpam_mon_sel_lock(msc)) {
+ ris->mbwu_state = mbwu_state;
+ mpam_mon_sel_unlock(msc);
+ }
+ }
+ }
+
return 0;
}
diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index 0c84e945c891..28c475d18d86 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -199,6 +199,26 @@ struct mon_cfg {
enum mon_filter_options opts;
};
+/*
+ * Changes to enabled and cfg are protected by the msc->lock.
+ * Changes to prev_val and correction are protected by the msc's mon_sel_lock.
+ */
+struct msmon_mbwu_state {
+ bool enabled;
+ struct mon_cfg cfg;
+
+ /* The value last read from the hardware. Used to detect overflow. */
+ u64 prev_val;
+
+ /*
+ * The value to add to the new reading to account for power management,
+ * and shifts to trigger the overflow interrupt.
+ */
+ u64 correction;
+
+ struct mpam_garbage garbage;
+};
+
struct mpam_class {
/* mpam_components in this class */
struct list_head components;
@@ -291,6 +311,9 @@ struct mpam_msc_ris {
/* parent: */
struct mpam_vmsc *vmsc;
+ /* msmon mbwu configuration is preserved over reset */
+ struct msmon_mbwu_state *mbwu_state;
+
struct mpam_garbage garbage;
};
--
2.39.5On Fri, 17 Oct 2025 18:56:40 +0000
James Morse <james.morse@arm.com> wrote:
> Bandwidth counters need to run continuously to correctly reflect the
> bandwidth.
>
> The value read may be lower than the previous value read in the case
> of overflow and when the hardware is reset due to CPU hotplug.
>
> Add struct mbwu_state to track the bandwidth counter to allow overflow
> and power management to be handled.
>
> Tested-by: Fenghua Yu <fenghuay@nvidia.com>
> Signed-off-by: James Morse <james.morse@arm.com>
Just one trivial thing from me. I'll take another look once the
questions from others are resolved.
> +/* Call with MSC lock and held */
> +static int mpam_save_mbwu_state(void *arg)
> +{
> + int i;
> + u64 val;
> + struct mon_cfg *cfg;
> + u32 cur_flt, cur_ctl, mon_sel;
> + struct mpam_msc_ris *ris = arg;
> + struct msmon_mbwu_state *mbwu_state;
> + struct mpam_msc *msc = ris->vmsc->msc;
> +
> + for (i = 0; i < ris->props.num_mbwu_mon; i++) {
> + mbwu_state = &ris->mbwu_state[i];
> + cfg = &mbwu_state->cfg;
Could pull some of the local variable declarations in here to make
their scope clear.
> +
> + if (WARN_ON_ONCE(!mpam_mon_sel_lock(msc)))
> + return -EIO;
> +
> + mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, i) |
> + FIELD_PREP(MSMON_CFG_MON_SEL_RIS, ris->ris_idx);
> + mpam_write_monsel_reg(msc, CFG_MON_SEL, mon_sel);
> +
> + cur_flt = mpam_read_monsel_reg(msc, CFG_MBWU_FLT);
> + cur_ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
> + mpam_write_monsel_reg(msc, CFG_MBWU_CTL, 0);
> +
> + val = mpam_read_monsel_reg(msc, MBWU);
> + mpam_write_monsel_reg(msc, MBWU, 0);
> +
> + cfg->mon = i;
> + cfg->pmg = FIELD_GET(MSMON_CFG_x_FLT_PMG, cur_flt);
> + cfg->match_pmg = FIELD_GET(MSMON_CFG_x_CTL_MATCH_PMG, cur_ctl);
> + cfg->partid = FIELD_GET(MSMON_CFG_x_FLT_PARTID, cur_flt);
> + mbwu_state->correction += val;
> + mbwu_state->enabled = FIELD_GET(MSMON_CFG_x_CTL_EN, cur_ctl);
> + mpam_mon_sel_unlock(msc);
> + }
> +
> + return 0;
> +}
The MSMON_MBWU register accumulates counts monotonically forward and
would not automatically cleared to zero on overflow. The overflow portion
is exactly what mpam_msmon_overflow_val() computes, there is no need to
additionally subtract mbwu_state->prev_val.
Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
MSMON_MBWU register must first be read to prevent it from being
inadvertently cleared by the write operation.
Finally, use the overflow bit instead of relying on counter wrap-around
to determine whether an overflow has occurred, that avoids the case where
a wrap-around (now > prev_val) is overlooked. So with this, prev_val no
longer has any use and remove it.
CC: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Zeng Heng <zengheng4@huawei.com>
---
drivers/resctrl/mpam_devices.c | 22 +++++++++++++++++-----
drivers/resctrl/mpam_internal.h | 3 ---
2 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 0dd048279e02..db4cec710091 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -1039,7 +1039,6 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
mbwu_state = &m->ris->mbwu_state[m->ctx->mon];
- mbwu_state->prev_val = 0;
break;
default:
@@ -1062,6 +1061,16 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
}
}
+static bool read_msmon_mbwu_is_overflow(struct mpam_msc *msc)
+{
+ u32 ctl;
+
+ ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
+ return ctl & (MSMON_CFG_x_CTL_OFLOW_STATUS |
+ MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L) ?
+ true : false;
+}
+
/* Call with MSC lock held */
static void __ris_msmon_read(void *arg)
{
@@ -1069,6 +1078,7 @@ static void __ris_msmon_read(void *arg)
bool config_mismatch;
struct mon_read *m = arg;
u64 now, overflow_val = 0;
+ bool mbwu_overflow = false;
struct mon_cfg *ctx = m->ctx;
bool reset_on_next_read = false;
struct mpam_msc_ris *ris = m->ris;
@@ -1091,6 +1101,7 @@ static void __ris_msmon_read(void *arg)
reset_on_next_read = mbwu_state->reset_on_next_read;
mbwu_state->reset_on_next_read = false;
}
+ mbwu_overflow = read_msmon_mbwu_is_overflow(msc);
}
/*
@@ -1103,8 +1114,10 @@ static void __ris_msmon_read(void *arg)
config_mismatch = cur_flt != flt_val ||
cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN);
- if (config_mismatch || reset_on_next_read)
+ if (config_mismatch || reset_on_next_read) {
write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
+ mbwu_overflow = false;
+ }
switch (m->type) {
case mpam_feat_msmon_csu:
@@ -1138,10 +1151,9 @@ static void __ris_msmon_read(void *arg)
mbwu_state = &ris->mbwu_state[ctx->mon];
/* Add any pre-overflow value to the mbwu_state->val */
- if (mbwu_state->prev_val > now)
- overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
+ if (mbwu_overflow)
+ overflow_val = mpam_msmon_overflow_val(m->type);
- mbwu_state->prev_val = now;
mbwu_state->correction += overflow_val;
/* Include bandwidth consumed before the last hardware reset */
diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index 4f25681b56ab..8837c0cd7b0c 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -226,9 +226,6 @@ struct msmon_mbwu_state {
bool reset_on_next_read;
struct mon_cfg cfg;
- /* The value last read from the hardware. Used to detect overflow. */
- u64 prev_val;
-
/*
* The value to add to the new reading to account for power management,
* and shifts to trigger the overflow interrupt.
--
2.25.1Hi Zeng,
On 10/29/25 07:56, Zeng Heng wrote:
> The MSMON_MBWU register accumulates counts monotonically forward and
> would not automatically cleared to zero on overflow. The overflow portion
> is exactly what mpam_msmon_overflow_val() computes, there is no need to
> additionally subtract mbwu_state->prev_val.
>
> Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
> MSMON_MBWU register must first be read to prevent it from being
> inadvertently cleared by the write operation.
>
> Finally, use the overflow bit instead of relying on counter wrap-around
> to determine whether an overflow has occurred, that avoids the case where
> a wrap-around (now > prev_val) is overlooked. So with this, prev_val no
> longer has any use and remove it.
>
> CC: Ben Horgan <ben.horgan@arm.com>
> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
> ---
> drivers/resctrl/mpam_devices.c | 22 +++++++++++++++++-----
> drivers/resctrl/mpam_internal.h | 3 ---
> 2 files changed, 17 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index 0dd048279e02..db4cec710091 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -1039,7 +1039,6 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
> mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
>
> mbwu_state = &m->ris->mbwu_state[m->ctx->mon];
> - mbwu_state->prev_val = 0;
>
> break;
> default:
> @@ -1062,6 +1061,16 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
> }
> }
>
> +static bool read_msmon_mbwu_is_overflow(struct mpam_msc *msc)
> +{
> + u32 ctl;
> +
> + ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
> + return ctl & (MSMON_CFG_x_CTL_OFLOW_STATUS |
> + MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L) ?
> + true : false;
> +}
> +
> /* Call with MSC lock held */
> static void __ris_msmon_read(void *arg)
> {
> @@ -1069,6 +1078,7 @@ static void __ris_msmon_read(void *arg)
> bool config_mismatch;
> struct mon_read *m = arg;
> u64 now, overflow_val = 0;
> + bool mbwu_overflow = false;
> struct mon_cfg *ctx = m->ctx;
> bool reset_on_next_read = false;
> struct mpam_msc_ris *ris = m->ris;
> @@ -1091,6 +1101,7 @@ static void __ris_msmon_read(void *arg)
> reset_on_next_read = mbwu_state->reset_on_next_read;
> mbwu_state->reset_on_next_read = false;
> }
> + mbwu_overflow = read_msmon_mbwu_is_overflow(msc);
> }
>
> /*
> @@ -1103,8 +1114,10 @@ static void __ris_msmon_read(void *arg)
> config_mismatch = cur_flt != flt_val ||
> cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN);
>
> - if (config_mismatch || reset_on_next_read)
> + if (config_mismatch || reset_on_next_read) {
> write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
> + mbwu_overflow = false;
> + }
>
> switch (m->type) {
> case mpam_feat_msmon_csu:
> @@ -1138,10 +1151,9 @@ static void __ris_msmon_read(void *arg)
> mbwu_state = &ris->mbwu_state[ctx->mon];
>
> /* Add any pre-overflow value to the mbwu_state->val */
> - if (mbwu_state->prev_val > now)
> - overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
This all looks fine for overflow, but what we've been forgetting about
is the power management. As James mentioned in his commit message, the
prev_val is after now check is doing double duty. If an msc is powered
down and reset then we lose the count. Hence, to keep an accurate count,
we should be considering this case too.
> + if (mbwu_overflow)
> + overflow_val = mpam_msmon_overflow_val(m->type);
>
> - mbwu_state->prev_val = now;
> mbwu_state->correction += overflow_val;
>
> /* Include bandwidth consumed before the last hardware reset */
> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
> index 4f25681b56ab..8837c0cd7b0c 100644
> --- a/drivers/resctrl/mpam_internal.h
> +++ b/drivers/resctrl/mpam_internal.h
> @@ -226,9 +226,6 @@ struct msmon_mbwu_state {
> bool reset_on_next_read;
> struct mon_cfg cfg;
>
> - /* The value last read from the hardware. Used to detect overflow. */
> - u64 prev_val;
> -
> /*
> * The value to add to the new reading to account for power management,
> * and shifts to trigger the overflow interrupt.
> --
> 2.25.1
>
>
>
--
Thanks,
Ben
Hi Ben,
On 2025/10/30 17:52, Ben Horgan wrote:
> Hi Zeng,
>
> On 10/29/25 07:56, Zeng Heng wrote:
>> The MSMON_MBWU register accumulates counts monotonically forward and
>> would not automatically cleared to zero on overflow. The overflow portion
>> is exactly what mpam_msmon_overflow_val() computes, there is no need to
>> additionally subtract mbwu_state->prev_val.
>>
>> Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
>> MSMON_MBWU register must first be read to prevent it from being
>> inadvertently cleared by the write operation.
>>
>> Finally, use the overflow bit instead of relying on counter wrap-around
>> to determine whether an overflow has occurred, that avoids the case where
>> a wrap-around (now > prev_val) is overlooked. So with this, prev_val no
>> longer has any use and remove it.
>>
>> CC: Ben Horgan <ben.horgan@arm.com>
>> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
>> ---
>> drivers/resctrl/mpam_devices.c | 22 +++++++++++++++++-----
>> drivers/resctrl/mpam_internal.h | 3 ---
>> 2 files changed, 17 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
>> index 0dd048279e02..db4cec710091 100644
>> --- a/drivers/resctrl/mpam_devices.c
>> +++ b/drivers/resctrl/mpam_devices.c
>> @@ -1039,7 +1039,6 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val,
>> mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val | MSMON_CFG_x_CTL_EN);
>>
>> mbwu_state = &m->ris->mbwu_state[m->ctx->mon];
>> - mbwu_state->prev_val = 0;
>>
>> break;
>> default:
>> @@ -1062,6 +1061,16 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
>> }
>> }
>>
>> +static bool read_msmon_mbwu_is_overflow(struct mpam_msc *msc)
>> +{
>> + u32 ctl;
>> +
>> + ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
>> + return ctl & (MSMON_CFG_x_CTL_OFLOW_STATUS |
>> + MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L) ?
>> + true : false;
>> +}
>> +
>> /* Call with MSC lock held */
>> static void __ris_msmon_read(void *arg)
>> {
>> @@ -1069,6 +1078,7 @@ static void __ris_msmon_read(void *arg)
>> bool config_mismatch;
>> struct mon_read *m = arg;
>> u64 now, overflow_val = 0;
>> + bool mbwu_overflow = false;
>> struct mon_cfg *ctx = m->ctx;
>> bool reset_on_next_read = false;
>> struct mpam_msc_ris *ris = m->ris;
>> @@ -1091,6 +1101,7 @@ static void __ris_msmon_read(void *arg)
>> reset_on_next_read = mbwu_state->reset_on_next_read;
>> mbwu_state->reset_on_next_read = false;
>> }
>> + mbwu_overflow = read_msmon_mbwu_is_overflow(msc);
>> }
>>
>> /*
>> @@ -1103,8 +1114,10 @@ static void __ris_msmon_read(void *arg)
>> config_mismatch = cur_flt != flt_val ||
>> cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN);
>>
>> - if (config_mismatch || reset_on_next_read)
>> + if (config_mismatch || reset_on_next_read) {
>> write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
>> + mbwu_overflow = false;
>> + }
>>
>> switch (m->type) {
>> case mpam_feat_msmon_csu:
>> @@ -1138,10 +1151,9 @@ static void __ris_msmon_read(void *arg)
>> mbwu_state = &ris->mbwu_state[ctx->mon];
>>
>> /* Add any pre-overflow value to the mbwu_state->val */
>> - if (mbwu_state->prev_val > now)
>> - overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
>
> This all looks fine for overflow, but what we've been forgetting about
> is the power management. As James mentioned in his commit message, the
> prev_val is after now check is doing double duty. If an msc is powered
> down and reset then we lose the count. Hence, to keep an accurate count,
> we should be considering this case too.
>
Regarding CPU power management and CPU on-/off-line scenarios, this
should and already has been handled by mpam_save_mbwu_state():
1. Freezes the current MSMON_MBWU counter into the
mbwu_state->correction;
2. Clears the MSMON_MBWU counter;
After the CPU is powered back on, the total bandwidth traffic is
MSMON_MBWU(the `now` variable) + correction.
So the above solution also covers CPU power-down scenarios, and no
additional code is needed to adapt to this case.
If I've missed anything, thanks in advance to point it out.
Best Regards,
Zeng Heng
Hi Zeng,
On 11/3/25 03:47, Zeng Heng wrote:
> Hi Ben,
>
> On 2025/10/30 17:52, Ben Horgan wrote:
>> Hi Zeng,
>>
>> On 10/29/25 07:56, Zeng Heng wrote:
>>> The MSMON_MBWU register accumulates counts monotonically forward and
>>> would not automatically cleared to zero on overflow. The overflow
>>> portion
>>> is exactly what mpam_msmon_overflow_val() computes, there is no need to
>>> additionally subtract mbwu_state->prev_val.
>>>
>>> Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
>>> MSMON_MBWU register must first be read to prevent it from being
>>> inadvertently cleared by the write operation.
>>>
>>> Finally, use the overflow bit instead of relying on counter wrap-around
>>> to determine whether an overflow has occurred, that avoids the case
>>> where
>>> a wrap-around (now > prev_val) is overlooked. So with this, prev_val no
>>> longer has any use and remove it.
>>>
>>> CC: Ben Horgan <ben.horgan@arm.com>
>>> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
>>> ---
>>> drivers/resctrl/mpam_devices.c | 22 +++++++++++++++++-----
>>> drivers/resctrl/mpam_internal.h | 3 ---
>>> 2 files changed, 17 insertions(+), 8 deletions(-)
>>
>> This all looks fine for overflow, but what we've been forgetting about
>> is the power management. As James mentioned in his commit message, the
>> prev_val is after now check is doing double duty. If an msc is powered
>> down and reset then we lose the count. Hence, to keep an accurate count,
>> we should be considering this case too.
>>
>
>
> Regarding CPU power management and CPU on-/off-line scenarios, this
> should and already has been handled by mpam_save_mbwu_state():
>
> 1. Freezes the current MSMON_MBWU counter into the
> mbwu_state->correction;
> 2. Clears the MSMON_MBWU counter;
>
> After the CPU is powered back on, the total bandwidth traffic is
> MSMON_MBWU(the `now` variable) + correction.
>
> So the above solution also covers CPU power-down scenarios, and no
> additional code is needed to adapt to this case.
>
> If I've missed anything, thanks in advance to point it out.
>
No, I don't think you missed anything. You just didn't mention in your commit message
that this is also fixing the power management case.
I'm going to post the next version of this series for James as he is otherwise engaged.
I've taken your patch and adapted it to fit in with the order of patches.
Does this look ok to you? The support for the long counters will be added later.
+static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
+{
+ /* TODO: scaling, and long counters */
+ return BIT_ULL(hweight_long(MSMON___VALUE));
+}
+
static void __ris_msmon_read(void *arg)
{
u64 now;
bool nrdy = false;
bool config_mismatch;
+ bool overflow;
struct mon_read *m = arg;
struct mon_cfg *ctx = m->ctx;
struct mpam_msc_ris *ris = m->ris;
@@ -1008,6 +1015,8 @@ static void __ris_msmon_read(void *arg)
* This saves waiting for 'nrdy' on subsequent reads.
*/
read_msmon_ctl_flt_vals(m, &cur_ctl, &cur_flt);
+ overflow = cur_ctl & MSMON_CFG_x_CTL_OFLOW_STATUS;
+
clean_msmon_ctl_val(&cur_ctl);
gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val);
config_mismatch = cur_flt != flt_val ||
@@ -1016,6 +1025,9 @@ static void __ris_msmon_read(void *arg)
if (config_mismatch) {
write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
overflow = false;
+ } else if (overflow) {
+ mpam_write_monsel_reg(msc, CFG_MBWU_CTL,
+ cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS);
}
switch (m->type) {
@@ -1039,7 +1051,10 @@ static void __ris_msmon_read(void *arg)
if (overflow)
mbwu_state->correction += mpam_msmon_overflow_val(m->type);
- /* Include bandwidth consumed before the last hardware reset */
+ /*
+ * Include bandwidth consumed before the last hardware reset and
+ * a counter size increment for each overflow.
+ */
now += mbwu_state->correction;
break;
default:
diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index d10edf4c0f0b..7e9390211df7 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -209,7 +209,8 @@ struct msmon_mbwu_state {
struct mon_cfg cfg;
/*
- * The value to add to the new reading to account for power management.
+ * The value to add to the new reading to account for power management,
+ * and overflow.
*/
u64 correction;
Thanks,
Ben
Hi Ben,
On 2025/11/4 18:24, Ben Horgan wrote:
> Hi Zeng,
>
> On 11/3/25 03:47, Zeng Heng wrote:
>> Hi Ben,
>>
>> On 2025/10/30 17:52, Ben Horgan wrote:
>>> Hi Zeng,
>>>
>>> On 10/29/25 07:56, Zeng Heng wrote:
>>>> The MSMON_MBWU register accumulates counts monotonically forward and
>>>> would not automatically cleared to zero on overflow. The overflow
>>>> portion
>>>> is exactly what mpam_msmon_overflow_val() computes, there is no need to
>>>> additionally subtract mbwu_state->prev_val.
>>>>
>>>> Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
>>>> MSMON_MBWU register must first be read to prevent it from being
>>>> inadvertently cleared by the write operation.
>>>>
>>>> Finally, use the overflow bit instead of relying on counter wrap-around
>>>> to determine whether an overflow has occurred, that avoids the case
>>>> where
>>>> a wrap-around (now > prev_val) is overlooked. So with this, prev_val no
>>>> longer has any use and remove it.
>>>>
>>>> CC: Ben Horgan <ben.horgan@arm.com>
>>>> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
>>>> ---
>>>> drivers/resctrl/mpam_devices.c | 22 +++++++++++++++++-----
>>>> drivers/resctrl/mpam_internal.h | 3 ---
>>>> 2 files changed, 17 insertions(+), 8 deletions(-)
>>>
>>> This all looks fine for overflow, but what we've been forgetting about
>>> is the power management. As James mentioned in his commit message, the
>>> prev_val is after now check is doing double duty. If an msc is powered
>>> down and reset then we lose the count. Hence, to keep an accurate count,
>>> we should be considering this case too.
>>>
>>
>>
>> Regarding CPU power management and CPU on-/off-line scenarios, this
>> should and already has been handled by mpam_save_mbwu_state():
>>
>> 1. Freezes the current MSMON_MBWU counter into the
>> mbwu_state->correction;
>> 2. Clears the MSMON_MBWU counter;
>>
>> After the CPU is powered back on, the total bandwidth traffic is
>> MSMON_MBWU(the `now` variable) + correction.
>>
>> So the above solution also covers CPU power-down scenarios, and no
>> additional code is needed to adapt to this case.
>>
>> If I've missed anything, thanks in advance to point it out.
>>
>
> No, I don't think you missed anything. You just didn't mention in your commit message
> that this is also fixing the power management case.
>
> I'm going to post the next version of this series for James as he is otherwise engaged.
> I've taken your patch and adapted it to fit in with the order of patches.
> Does this look ok to you? The support for the long counters will be added later.
>
Yes, I have reviewed the patch, and the related adaptations look good to
me.
> @@ -1016,6 +1025,9 @@ static void __ris_msmon_read(void *arg)
> if (config_mismatch) {
> write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
> overflow = false;
> + } else if (overflow) {
> + mpam_write_monsel_reg(msc, CFG_MBWU_CTL,
> + cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS);
> }
Yes, the clear register operation is added here.
Best Regards,
Zeng Heng
Bandwidth counters need to run continuously to correctly reflect the
bandwidth. When reading the previously configured MSMON_CFG_MBWU_CTL,
software must recognize that the MSMON_CFG_x_CTL_OFLOW_STATUS bit may
have been set by hardware because of the counter overflow.
The existing logic incorrectly treats this bit as an indication that the
monitor configuration has been changed and consequently zeros the MBWU
statistics by mistake.
Also fix the handling of overflow amount calculation. There's no need to
subtract mbwu_state->prev_val when calculating overflow_val.
Signed-off-by: Zeng Heng <zengheng4@huawei.com>
---
drivers/resctrl/mpam_devices.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 0dd048279e02..06f3ec9887d2 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg)
clean_msmon_ctl_val(&cur_ctl);
gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val);
config_mismatch = cur_flt != flt_val ||
- cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN);
+ (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) !=
+ (ctl_val | MSMON_CFG_x_CTL_EN);
if (config_mismatch || reset_on_next_read)
write_msmon_ctl_flt_vals(m, ctl_val, flt_val);
@@ -1138,8 +1139,9 @@ static void __ris_msmon_read(void *arg)
mbwu_state = &ris->mbwu_state[ctx->mon];
/* Add any pre-overflow value to the mbwu_state->val */
- if (mbwu_state->prev_val > now)
- overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
+ if (mbwu_state->prev_val > now &&
+ (cur_ctl & MSMON_CFG_x_CTL_OFLOW_STATUS))
+ overflow_val = mpam_msmon_overflow_val(ris);
mbwu_state->prev_val = now;
mbwu_state->correction += overflow_val;
--
2.25.1Hi Zeng, On 10/22/25 14:39, Zeng Heng wrote: > Bandwidth counters need to run continuously to correctly reflect the > bandwidth. When reading the previously configured MSMON_CFG_MBWU_CTL, > software must recognize that the MSMON_CFG_x_CTL_OFLOW_STATUS bit may > have been set by hardware because of the counter overflow. > > The existing logic incorrectly treats this bit as an indication that the > monitor configuration has been changed and consequently zeros the MBWU > statistics by mistake. By zero-ing when the overflow bit is set we miss out on the counts after the overflow and before the zero-ing. Do I understand correctly, that this what this patch is aiming to fix? > > Also fix the handling of overflow amount calculation. There's no need to > subtract mbwu_state->prev_val when calculating overflow_val. Why not? Isn't this the pre-overflow part that we are missing from the running count? > > Signed-off-by: Zeng Heng <zengheng4@huawei.com> > --- > drivers/resctrl/mpam_devices.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c > index 0dd048279e02..06f3ec9887d2 100644 > --- a/drivers/resctrl/mpam_devices.c > +++ b/drivers/resctrl/mpam_devices.c > @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) > clean_msmon_ctl_val(&cur_ctl); > gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); > config_mismatch = cur_flt != flt_val || > - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); > + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != > + (ctl_val | MSMON_CFG_x_CTL_EN); This only considers 31 bit counters. I would expect any change here to consider all lengths of counter. Also, as the overflow bit is no longer reset due to the config mismatch it needs to be reset somewhere else. > > if (config_mismatch || reset_on_next_read) > write_msmon_ctl_flt_vals(m, ctl_val, flt_val); > @@ -1138,8 +1139,9 @@ static void __ris_msmon_read(void *arg) > mbwu_state = &ris->mbwu_state[ctx->mon]; > > /* Add any pre-overflow value to the mbwu_state->val */ > - if (mbwu_state->prev_val > now) > - overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val; > + if (mbwu_state->prev_val > now && > + (cur_ctl & MSMON_CFG_x_CTL_OFLOW_STATUS)) > + overflow_val = mpam_msmon_overflow_val(ris); > > mbwu_state->prev_val = now; > mbwu_state->correction += overflow_val; Thanks, Ben
Hi Ben, On 2025/10/23 0:17, Ben Horgan wrote: >> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >> --- >> drivers/resctrl/mpam_devices.c | 8 +++++--- >> 1 file changed, 5 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c >> index 0dd048279e02..06f3ec9887d2 100644 >> --- a/drivers/resctrl/mpam_devices.c >> +++ b/drivers/resctrl/mpam_devices.c >> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >> clean_msmon_ctl_val(&cur_ctl); >> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >> config_mismatch = cur_flt != flt_val || >> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >> + (ctl_val | MSMON_CFG_x_CTL_EN); > > This only considers 31 bit counters. I would expect any change here to > consider all lengths of counter. > Sorry, regardless of whether the counter is 32-bit or 64-bit, the config_mismatch logic should be handled the same way here. Am I wrong? Best Regards, Zeng Heng
Hi Zeng, On 10/25/25 10:01, Zeng Heng wrote: > Hi Ben, > > On 2025/10/23 0:17, Ben Horgan wrote: > >>> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >>> --- >>> drivers/resctrl/mpam_devices.c | 8 +++++--- >>> 1 file changed, 5 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/ >>> mpam_devices.c >>> index 0dd048279e02..06f3ec9887d2 100644 >>> --- a/drivers/resctrl/mpam_devices.c >>> +++ b/drivers/resctrl/mpam_devices.c >>> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >>> clean_msmon_ctl_val(&cur_ctl); >>> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >>> config_mismatch = cur_flt != flt_val || >>> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >>> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >>> + (ctl_val | MSMON_CFG_x_CTL_EN); >> >> This only considers 31 bit counters. I would expect any change here to >> consider all lengths of counter. > > Sorry, regardless of whether the counter is 32-bit or 64-bit, the > config_mismatch logic should be handled the same way here. Am I > wrong? Yes, they should be handled the same way. However, the overflow status bit for long counters is MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L. I now see that the existing code in the series has this covered. Both the overflow bits are masked out in clean_msmon_ctl_val(). No need for any additional masking. > > Best Regards, > Zeng Heng > > Thanks, Ben
Hi Ben, On 2025/10/29 0:01, Ben Horgan wrote: > Hi Zeng, > > On 10/25/25 10:01, Zeng Heng wrote: >> Hi Ben, >> >> On 2025/10/23 0:17, Ben Horgan wrote: >> >>>> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >>>> --- >>>> drivers/resctrl/mpam_devices.c | 8 +++++--- >>>> 1 file changed, 5 insertions(+), 3 deletions(-) >>>> >>>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/ >>>> mpam_devices.c >>>> index 0dd048279e02..06f3ec9887d2 100644 >>>> --- a/drivers/resctrl/mpam_devices.c >>>> +++ b/drivers/resctrl/mpam_devices.c >>>> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >>>> clean_msmon_ctl_val(&cur_ctl); >>>> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >>>> config_mismatch = cur_flt != flt_val || >>>> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >>>> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >>>> + (ctl_val | MSMON_CFG_x_CTL_EN); >>> >>> This only considers 31 bit counters. I would expect any change here to >>> consider all lengths of counter. >> >> Sorry, regardless of whether the counter is 32-bit or 64-bit, the >> config_mismatch logic should be handled the same way here. Am I >> wrong? > > Yes, they should be handled the same way. However, the overflow status > bit for long counters is MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L. > > I now see that the existing code in the series has this covered. > Both the overflow bits are masked out in clean_msmon_ctl_val(). No need > for any additional masking. > Yes, I’ve seen the usage, except that clearing the overflow bit in the register is missing. Best Regards, Zeng Heng
Hi Ben, On 2025/10/29 10:49, Zeng Heng wrote: > Hi Ben, > > On 2025/10/29 0:01, Ben Horgan wrote: >> Hi Zeng, >> >> On 10/25/25 10:01, Zeng Heng wrote: >>> Hi Ben, >>> >>> On 2025/10/23 0:17, Ben Horgan wrote: >>> >>>>> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >>>>> --- >>>>> drivers/resctrl/mpam_devices.c | 8 +++++--- >>>>> 1 file changed, 5 insertions(+), 3 deletions(-) >>>>> >>>>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/ >>>>> mpam_devices.c >>>>> index 0dd048279e02..06f3ec9887d2 100644 >>>>> --- a/drivers/resctrl/mpam_devices.c >>>>> +++ b/drivers/resctrl/mpam_devices.c >>>>> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >>>>> clean_msmon_ctl_val(&cur_ctl); >>>>> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >>>>> config_mismatch = cur_flt != flt_val || >>>>> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >>>>> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >>>>> + (ctl_val | MSMON_CFG_x_CTL_EN); >>>> >>>> This only considers 31 bit counters. I would expect any change here to >>>> consider all lengths of counter. >>> >>> Sorry, regardless of whether the counter is 32-bit or 64-bit, the >>> config_mismatch logic should be handled the same way here. Am I >>> wrong? >> >> Yes, they should be handled the same way. However, the overflow status >> bit for long counters is MSMON_CFG_MBWU_CTL_OFLOW_STATUS_L. >> >> I now see that the existing code in the series has this covered. >> Both the overflow bits are masked out in clean_msmon_ctl_val(). No need >> for any additional masking. >> > > Yes, I’ve seen the usage, except that clearing the overflow bit in the > register is missing. > Please disregard my previous mail... :) Exactly, thanks for the review. I'll fold the fixes into v2 of the patch. Best Regards, Zeng Heng
Hi Ben, On 2025/10/23 0:17, Ben Horgan wrote: >> >> Also fix the handling of overflow amount calculation. There's no need to >> subtract mbwu_state->prev_val when calculating overflow_val. > > Why not? Isn't this the pre-overflow part that we are missing from the > running count? > The MSMON_MBWU register accumulates counts monotonically forward and would not automatically cleared to zero on overflow. The overflow portion is exactly what mpam_msmon_overflow_val() computes, there is no need to additionally subtract mbwu_state->prev_val. >> >> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >> --- >> drivers/resctrl/mpam_devices.c | 8 +++++--- >> 1 file changed, 5 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c >> index 0dd048279e02..06f3ec9887d2 100644 >> --- a/drivers/resctrl/mpam_devices.c >> +++ b/drivers/resctrl/mpam_devices.c >> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >> clean_msmon_ctl_val(&cur_ctl); >> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >> config_mismatch = cur_flt != flt_val || >> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >> + (ctl_val | MSMON_CFG_x_CTL_EN); > > This only considers 31 bit counters. I would expect any change here to > consider all lengths of counter. Also, as the overflow bit is no longer > reset due to the config mismatch it needs to be reset somewhere else. Yes, overflow bit needs to be cleared somewhere. I try to point out in the next patch mail. Best Regards, Zeng Heng
Hi Zeng, On 10/25/25 09:45, Zeng Heng wrote: > Hi Ben, > > On 2025/10/23 0:17, Ben Horgan wrote: >>> >>> Also fix the handling of overflow amount calculation. There's no need to >>> subtract mbwu_state->prev_val when calculating overflow_val. >> >> Why not? Isn't this the pre-overflow part that we are missing from the >> running count? >> > > The MSMON_MBWU register accumulates counts monotonically forward and > would not automatically cleared to zero on overflow. > > The overflow portion is exactly what mpam_msmon_overflow_val() computes, > there is no need to additionally subtract mbwu_state->prev_val. Yes, I now see you are correct. The 'correction' ends up holding (counter size) * (number of overflows) and the current value of the counter plus this gives you the bandwidth use up until now. > >>> >>> Signed-off-by: Zeng Heng <zengheng4@huawei.com> >>> --- >>> drivers/resctrl/mpam_devices.c | 8 +++++--- >>> 1 file changed, 5 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/ >>> mpam_devices.c >>> index 0dd048279e02..06f3ec9887d2 100644 >>> --- a/drivers/resctrl/mpam_devices.c >>> +++ b/drivers/resctrl/mpam_devices.c >>> @@ -1101,7 +1101,8 @@ static void __ris_msmon_read(void *arg) >>> clean_msmon_ctl_val(&cur_ctl); >>> gen_msmon_ctl_flt_vals(m, &ctl_val, &flt_val); >>> config_mismatch = cur_flt != flt_val || >>> - cur_ctl != (ctl_val | MSMON_CFG_x_CTL_EN); >>> + (cur_ctl & ~MSMON_CFG_x_CTL_OFLOW_STATUS) != >>> + (ctl_val | MSMON_CFG_x_CTL_EN); >> >> This only considers 31 bit counters. I would expect any change here to >> consider all lengths of counter. Also, as the overflow bit is no longer >> reset due to the config mismatch it needs to be reset somewhere else. > > Yes, overflow bit needs to be cleared somewhere. I try to point out in > the next patch mail. I had misunderstood before but the current code in the series doesn't make use of overflow bit and just relies on prev_val > now. Using overflow status does give us a bit more lee-way for overflowing so is a useful enhancement. > > Best Regards, > Zeng Heng > > Thanks, Ben
The MSMON_MBWU register accumulates counts monotonically forward and
would not automatically cleared to zero on overflow. The overflow portion
is exactly what mpam_msmon_overflow_val() computes, there is no need to
additionally subtract mbwu_state->prev_val.
Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
MSMON_MBWU register must first be read to prevent it from being
inadvertently cleared by the write operation. Then, before updating the
monitor configuration, the overflow bit should be cleared to zero.
Finally, use the overflow bit instead of relying on counter wrap-around
to determine whether an overflow has occurred, that avoids the case where
a wrap-around (now > prev_val) is overlooked.
Signed-off-by: Zeng Heng <zengheng4@huawei.com>
---
drivers/resctrl/mpam_devices.c | 21 +++++++++++++++++++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index 0dd048279e02..575980e3a366 100644
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -1062,6 +1062,21 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
}
}
+static bool read_msmon_mbwu_is_overflow(struct mpam_msc *msc)
+{
+ u32 ctl;
+ bool overflow;
+
+ ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
+ overflow = ctl & MSMON_CFG_x_CTL_OFLOW_STATUS ? true : false;
+
+ if (overflow)
+ mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl &
+ ~MSMON_CFG_x_CTL_OFLOW_STATUS);
+
+ return overflow;
+}
+
/* Call with MSC lock held */
static void __ris_msmon_read(void *arg)
{
@@ -1069,6 +1084,7 @@ static void __ris_msmon_read(void *arg)
bool config_mismatch;
struct mon_read *m = arg;
u64 now, overflow_val = 0;
+ bool mbwu_overflow = false;
struct mon_cfg *ctx = m->ctx;
bool reset_on_next_read = false;
struct mpam_msc_ris *ris = m->ris;
@@ -1091,6 +1107,7 @@ static void __ris_msmon_read(void *arg)
reset_on_next_read = mbwu_state->reset_on_next_read;
mbwu_state->reset_on_next_read = false;
}
+ mbwu_overflow = read_msmon_mbwu_is_overflow(msc);
}
/*
@@ -1138,8 +1155,8 @@ static void __ris_msmon_read(void *arg)
mbwu_state = &ris->mbwu_state[ctx->mon];
/* Add any pre-overflow value to the mbwu_state->val */
- if (mbwu_state->prev_val > now)
- overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
+ if (mbwu_overflow)
+ overflow_val = mpam_msmon_overflow_val(m->type);
mbwu_state->prev_val = now;
mbwu_state->correction += overflow_val;
--
2.25.1Hi Zeng,
On 10/25/25 10:34, Zeng Heng wrote:
> The MSMON_MBWU register accumulates counts monotonically forward and
> would not automatically cleared to zero on overflow. The overflow portion
> is exactly what mpam_msmon_overflow_val() computes, there is no need to
> additionally subtract mbwu_state->prev_val.
>
> Before invoking write_msmon_ctl_flt_vals(), the overflow bit of the
> MSMON_MBWU register must first be read to prevent it from being
> inadvertently cleared by the write operation. Then, before updating the
> monitor configuration, the overflow bit should be cleared to zero.
>
> Finally, use the overflow bit instead of relying on counter wrap-around
> to determine whether an overflow has occurred, that avoids the case where
> a wrap-around (now > prev_val) is overlooked.
>
> Signed-off-by: Zeng Heng <zengheng4@huawei.com>
> ---
> drivers/resctrl/mpam_devices.c | 21 +++++++++++++++++++--
> 1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index 0dd048279e02..575980e3a366 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -1062,6 +1062,21 @@ static u64 mpam_msmon_overflow_val(enum mpam_device_features type)
> }
> }
>
> +static bool read_msmon_mbwu_is_overflow(struct mpam_msc *msc)
> +{
> + u32 ctl;
> + bool overflow;
> +
> + ctl = mpam_read_monsel_reg(msc, CFG_MBWU_CTL);
> + overflow = ctl & MSMON_CFG_x_CTL_OFLOW_STATUS ? true : false;
> +
> + if (overflow)
> + mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl &
> + ~MSMON_CFG_x_CTL_OFLOW_STATUS);
Seems sensible. It's best to consider the overflow status bit for long
counters as well. Although, that's introduced later in the series so
depends on patch ordering. (Sorry, was considering patches on top of the
full series when I commented on counter length before.)
> +
> + return overflow;
> +}
> +
> /* Call with MSC lock held */
> static void __ris_msmon_read(void *arg)
> {
> @@ -1069,6 +1084,7 @@ static void __ris_msmon_read(void *arg)
> bool config_mismatch;
> struct mon_read *m = arg;
> u64 now, overflow_val = 0;
> + bool mbwu_overflow = false;
> struct mon_cfg *ctx = m->ctx;
> bool reset_on_next_read = false;
> struct mpam_msc_ris *ris = m->ris;
> @@ -1091,6 +1107,7 @@ static void __ris_msmon_read(void *arg)
> reset_on_next_read = mbwu_state->reset_on_next_read;
> mbwu_state->reset_on_next_read = false;
> }
> + mbwu_overflow = read_msmon_mbwu_is_overflow(msc);
If the config is then found to mismatch, then mbwu_overflow can be
subsequently set to false.
> }
>
> /*
> @@ -1138,8 +1155,8 @@ static void __ris_msmon_read(void *arg)
> mbwu_state = &ris->mbwu_state[ctx->mon];
>
> /* Add any pre-overflow value to the mbwu_state->val */
> - if (mbwu_state->prev_val > now)
> - overflow_val = mpam_msmon_overflow_val(m->type) - mbwu_state->prev_val;
> + if (mbwu_overflow)
> + overflow_val = mpam_msmon_overflow_val(m->type);
Yep, makes sense.
>
> mbwu_state->prev_val = now;
With this prev_val no longer has any use.
> mbwu_state->correction += overflow_val;
Thanks,
Ben
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