Move the code for updating speculation related MSRs to bugs.c.  Besides
belonging more naturally there, this allows for making the 3 functions it
calls static.  Also this prepares the code for when re-patching will also
need to call this same routine.

No functional change.

Signed-off-by: David Kaplan <david.kaplan@amd.com>
---
 arch/x86/include/asm/bugs.h  |  1 +
 arch/x86/kernel/cpu/bugs.c   | 14 +++++++++++---
 arch/x86/kernel/cpu/common.c |  6 +-----
 arch/x86/kernel/cpu/cpu.h    |  4 ----
 4 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/arch/x86/include/asm/bugs.h b/arch/x86/include/asm/bugs.h
index e43b9412645e..2e1a7d282e51 100644
--- a/arch/x86/include/asm/bugs.h
+++ b/arch/x86/include/asm/bugs.h
@@ -12,5 +12,6 @@ static inline int ppro_with_ram_bug(void) { return 0; }
 
 extern void cpu_bugs_smt_update(void);
 void arch_cpu_reset_mitigations(void);
+void cpu_bugs_update_speculation_msrs(void);
 
 #endif /* _ASM_X86_BUGS_H */
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 06061bcb08b8..2f82261d033d 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -925,7 +925,7 @@ static const char * const srbds_strings[] = {
 
 static bool srbds_off;
 
-void update_srbds_msr(void)
+static void update_srbds_msr(void)
 {
 	u64 mcu_ctrl;
 
@@ -1085,7 +1085,7 @@ bool gds_ucode_mitigated(void)
 }
 EXPORT_SYMBOL_GPL(gds_ucode_mitigated);
 
-void update_gds_msr(void)
+static void update_gds_msr(void)
 {
 	u64 mcu_ctrl_after;
 	u64 mcu_ctrl;
@@ -3014,7 +3014,7 @@ int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
 	}
 }
 
-void x86_spec_ctrl_setup_ap(void)
+static void x86_spec_ctrl_setup_ap(void)
 {
 	if (boot_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
 		update_spec_ctrl(x86_spec_ctrl_base);
@@ -4010,3 +4010,11 @@ void arch_cpu_reset_mitigations(void)
 	vmscape_reset_mitigation();
 }
 #endif
+
+void cpu_bugs_update_speculation_msrs(void)
+{
+	x86_spec_ctrl_setup_ap();
+	update_srbds_msr();
+	if (boot_cpu_has_bug(X86_BUG_GDS))
+		update_gds_msr();
+}
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index c7d3512914ca..c37ff92aaec2 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -2138,11 +2138,7 @@ void identify_secondary_cpu(unsigned int cpu)
 #ifdef CONFIG_X86_32
 	enable_sep_cpu();
 #endif
-	x86_spec_ctrl_setup_ap();
-	update_srbds_msr();
-	if (boot_cpu_has_bug(X86_BUG_GDS))
-		update_gds_msr();
-
+	cpu_bugs_update_speculation_msrs();
 	tsx_ap_init();
 	c->initialized = true;
 }
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index bc38b2d56f26..48ecc6dbaaa1 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -87,10 +87,6 @@ static inline struct amd_northbridge *amd_init_l3_cache(int index)
 unsigned int aperfmperf_get_khz(int cpu);
 void cpu_select_mitigations(void);
 
-extern void x86_spec_ctrl_setup_ap(void);
-extern void update_srbds_msr(void);
-extern void update_gds_msr(void);
-
 extern enum spectre_v2_mitigation spectre_v2_enabled;
 
 static inline bool spectre_v2_in_eibrs_mode(enum spectre_v2_mitigation mode)
-- 
2.34.1