Add edp reference clock for edp phy on lemans chipset.
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
---
arch/arm64/boot/dts/qcom/lemans.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index cf685cb186ed..1bcf1edd9382 100644
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -5034,9 +5034,11 @@
<0x0 0x0aec2000 0x0 0x1c8>;
clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>,
- <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_EDP_REF_CLKREF_EN>;
clock-names = "aux",
- "cfg_ahb";
+ "cfg_ahb",
+ "ref";
#clock-cells = <1>;
#phy-cells = <0>;
@@ -5053,9 +5055,11 @@
<0x0 0x0aec5000 0x0 0x1c8>;
clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK>,
- <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>;
+ <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>,
+ <&gcc GCC_EDP_REF_CLKREF_EN>;
clock-names = "aux",
- "cfg_ahb";
+ "cfg_ahb",
+ "ref";
#clock-cells = <1>;
#phy-cells = <0>;
--
2.17.1
On Mon, Oct 13, 2025 at 04:18:06PM +0530, Ritesh Kumar wrote: > Add edp reference clock for edp phy on lemans chipset. eDP, PHY, Fixes:foo bar baz > > Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com> > --- > arch/arm64/boot/dts/qcom/lemans.dtsi | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi > index cf685cb186ed..1bcf1edd9382 100644 > --- a/arch/arm64/boot/dts/qcom/lemans.dtsi > +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi > @@ -5034,9 +5034,11 @@ > <0x0 0x0aec2000 0x0 0x1c8>; > > clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>, > - <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>; > + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > + <&gcc GCC_EDP_REF_CLKREF_EN>; > clock-names = "aux", > - "cfg_ahb"; > + "cfg_ahb", > + "ref"; > > #clock-cells = <1>; > #phy-cells = <0>; > @@ -5053,9 +5055,11 @@ > <0x0 0x0aec5000 0x0 0x1c8>; > > clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK>, > - <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>; > + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > + <&gcc GCC_EDP_REF_CLKREF_EN>; > clock-names = "aux", > - "cfg_ahb"; > + "cfg_ahb", > + "ref"; > > #clock-cells = <1>; > #phy-cells = <0>; > -- > 2.17.1 > -- With best wishes Dmitry
On 10/13/2025 6:05 PM, Dmitry Baryshkov wrote: > On Mon, Oct 13, 2025 at 04:18:06PM +0530, Ritesh Kumar wrote: > > Add edp reference clock for edp phy on lemans chipset. > > eDP, PHY, Fixes:foo bar baz Sure, will update in next version. > > > > > Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com> > > --- > > arch/arm64/boot/dts/qcom/lemans.dtsi | 12 ++++++++---- > > 1 file changed, 8 insertions(+), 4 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi > > index cf685cb186ed..1bcf1edd9382 100644 > > --- a/arch/arm64/boot/dts/qcom/lemans.dtsi > > +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi > > @@ -5034,9 +5034,11 @@ > > <0x0 0x0aec2000 0x0 0x1c8>; > > > > clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX0_AUX_CLK>, > > - <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>; > > + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > > + <&gcc GCC_EDP_REF_CLKREF_EN>; > > clock-names = "aux", > > - "cfg_ahb"; > > + "cfg_ahb", > > + "ref"; > > > > #clock-cells = <1>; > > #phy-cells = <0>; > > @@ -5053,9 +5055,11 @@ > > <0x0 0x0aec5000 0x0 0x1c8>; > > > > clocks = <&dispcc0 MDSS_DISP_CC_MDSS_DPTX1_AUX_CLK>, > > - <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>; > > + <&dispcc0 MDSS_DISP_CC_MDSS_AHB_CLK>, > > + <&gcc GCC_EDP_REF_CLKREF_EN>; > > clock-names = "aux", > > - "cfg_ahb"; > > + "cfg_ahb", > > + "ref"; > > > > #clock-cells = <1>; > > #phy-cells = <0>; > > -- > > 2.17.1 > > >
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