arch/arm64/boot/dts/qcom/sm8450.dtsi | 55 +++++++++++++------ arch/arm64/boot/dts/qcom/sm8550.dtsi | 79 +++++++++++++++++++-------- arch/arm64/boot/dts/qcom/sm8650.dtsi | 79 +++++++++++++++++++-------- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 98 +++++++++++++++++++++++++++------- drivers/pci/controller/dwc/pcie-qcom.c | 17 +++++- 5 files changed, 247 insertions(+), 81 deletions(-)
The existing OPP table in the device tree for PCIe is shared across
different link configurations such as data rates 8GT/s x2 and 16GT/s x1.
These configurations often operate at the same frequency, allowing them
to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have
different characteristics beyond frequency—such as RPMh votes in QCOM
case, which cannot be represented accurately when sharing a single OPP.
In such cases, frequency alone is not sufficient to uniquely identify
an OPP. To support these scenarios, introduce a new API
dev_pm_opp_find_key_exact() that allows OPP lookup for set of keys like
frequency, level & bandwidth.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
---
Changes in v5:
- Add support for legacy devicetree's (Neil).
- Update commit text and comments to use data rates instead of GEN (Mani).
- Link to v4: https://lore.kernel.org/r/20250820-opp_pcie-v4-0-273b8944eed0@oss.qualcomm.com
Changes in v4:
- Included dtsi changes for all platforms.
- Made the changes as requested by Viresh like adding comments, some
coding styles etc.
- Link to v3: https://lore.kernel.org/r/20250819-opp_pcie-v3-0-f8bd7e05ce41@oss.qualcomm.com
Changes in v3:
- Always check for frequency match unless user doesn't pass it (Viresh).
- Make dev_pm_opp_key public and let user pass the key (Viresh).
- Include bandwidth as part of dev_pm_opp_key (Viresh).
- Link to v2: https://lore.kernel.org/r/20250818-opp_pcie-v2-0-071524d98967@oss.qualcomm.com
Changes in v2:
- Use opp-level to indentify data rate and use both frequency and level
to identify the OPP. (Viresh)
- Link to v1: https://lore.kernel.org/r/20250717-opp_pcie-v1-0-dde6f452571b@oss.qualcomm.com
---
Krishna Chaitanya Chundru (5):
arm64: dts: qcom: sm8450: Add opp-level to indicate PCIe data rates
arm64: dts: qcom: sm8550: Add opp-level to indicate PCIe data rates
arm64: dts: qcom: sm8650: Add opp-level to indicate PCIe data rates
arm64: dts: qcom: x1e80100: Add opp-level to indicate PCIe data rates
PCI: qcom: Use frequency and level based OPP lookup
arch/arm64/boot/dts/qcom/sm8450.dtsi | 55 +++++++++++++------
arch/arm64/boot/dts/qcom/sm8550.dtsi | 79 +++++++++++++++++++--------
arch/arm64/boot/dts/qcom/sm8650.dtsi | 79 +++++++++++++++++++--------
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 98 +++++++++++++++++++++++++++-------
drivers/pci/controller/dwc/pcie-qcom.c | 17 +++++-
5 files changed, 247 insertions(+), 81 deletions(-)
---
base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787
change-id: 20250717-opp_pcie-793160b2b113
Best regards,
--
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
On Mon, Oct 13, 2025 at 04:23:27PM +0530, Krishna Chaitanya Chundru wrote: > The existing OPP table in the device tree for PCIe is shared across > different link configurations such as data rates 8GT/s x2 and 16GT/s x1. > These configurations often operate at the same frequency, allowing them > to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have > different characteristics beyond frequency—such as RPMh votes in QCOM > case, which cannot be represented accurately when sharing a single OPP. > > In such cases, frequency alone is not sufficient to uniquely identify > an OPP. To support these scenarios, introduce a new API > dev_pm_opp_find_key_exact() that allows OPP lookup for set of keys like > frequency, level & bandwidth. > > Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> > --- > Changes in v5: > - Add support for legacy devicetree's (Neil). > - Update commit text and comments to use data rates instead of GEN (Mani). > - Link to v4: https://lore.kernel.org/r/20250820-opp_pcie-v4-0-273b8944eed0@oss.qualcomm.com > > Changes in v4: > - Included dtsi changes for all platforms. > - Made the changes as requested by Viresh like adding comments, some > coding styles etc. > - Link to v3: https://lore.kernel.org/r/20250819-opp_pcie-v3-0-f8bd7e05ce41@oss.qualcomm.com > > Changes in v3: > - Always check for frequency match unless user doesn't pass it (Viresh). > - Make dev_pm_opp_key public and let user pass the key (Viresh). > - Include bandwidth as part of dev_pm_opp_key (Viresh). > - Link to v2: https://lore.kernel.org/r/20250818-opp_pcie-v2-0-071524d98967@oss.qualcomm.com > > Changes in v2: > - Use opp-level to indentify data rate and use both frequency and level > to identify the OPP. (Viresh) > - Link to v1: https://lore.kernel.org/r/20250717-opp_pcie-v1-0-dde6f452571b@oss.qualcomm.com > > --- > Krishna Chaitanya Chundru (5): > arm64: dts: qcom: sm8450: Add opp-level to indicate PCIe data rates > arm64: dts: qcom: sm8550: Add opp-level to indicate PCIe data rates > arm64: dts: qcom: sm8650: Add opp-level to indicate PCIe data rates > arm64: dts: qcom: x1e80100: Add opp-level to indicate PCIe data rates > PCI: qcom: Use frequency and level based OPP lookup > > arch/arm64/boot/dts/qcom/sm8450.dtsi | 55 +++++++++++++------ > arch/arm64/boot/dts/qcom/sm8550.dtsi | 79 +++++++++++++++++++-------- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 79 +++++++++++++++++++-------- > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 98 +++++++++++++++++++++++++++------- Acked-by: Manivannan Sadhasivam <mani@kernel.org> - Mani -- மணிவண்ணன் சதாசிவம்
On Mon, 13 Oct 2025 16:23:27 +0530, Krishna Chaitanya Chundru wrote:
> The existing OPP table in the device tree for PCIe is shared across
> different link configurations such as data rates 8GT/s x2 and 16GT/s x1.
> These configurations often operate at the same frequency, allowing them
> to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have
> different characteristics beyond frequency—such as RPMh votes in QCOM
> case, which cannot be represented accurately when sharing a single OPP.
>
> [...]
Applied, thanks!
[5/5] PCI: qcom: Use frequency and level based OPP lookup
commit: b673c47c9cb186f7008944ca708d2313a38721dd
Best regards,
--
Manivannan Sadhasivam <mani@kernel.org>
On Mon, 13 Oct 2025 16:23:27 +0530, Krishna Chaitanya Chundru wrote:
> The existing OPP table in the device tree for PCIe is shared across
> different link configurations such as data rates 8GT/s x2 and 16GT/s x1.
> These configurations often operate at the same frequency, allowing them
> to reuse the same OPP entries. However, 8GT/s and 16 GT/s may have
> different characteristics beyond frequency—such as RPMh votes in QCOM
> case, which cannot be represented accurately when sharing a single OPP.
>
> [...]
Applied, thanks!
[1/5] arm64: dts: qcom: sm8450: Add opp-level to indicate PCIe data rates
commit: 367c2f473f5f5a84cdf633df96e0f9b4a16e443d
[2/5] arm64: dts: qcom: sm8550: Add opp-level to indicate PCIe data rates
commit: fc0ed54869be3a40c92879411b6db553d271de4d
[3/5] arm64: dts: qcom: sm8650: Add opp-level to indicate PCIe data rates
commit: 860d514f09f0ccecd233808b44918ac5b2c10627
[4/5] arm64: dts: qcom: x1e80100: Add opp-level to indicate PCIe data rates
commit: cfd8f45ddf8944fa95ae3e8cb5159c62fef95e34
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
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