The memory map lists each clock module unit as having a size of
0x10000. Additionally there are some undocumented registers in this region
that need to be used for automatic clock gating mode. Some of those
registers also need to be saved/restored on suspend & resume.
Fixes: 86124c76683e ("arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller")
Fixes: 4982a4a2092e ("arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller")
Fixes: 7d66d98b5bf3 ("arm64: dts: exynos: gs101: enable cmu-peric1 clock controller")
Fixes: e62c706f3aa0 ("arm64: dts: exynos: gs101: enable cmu-peric0 clock controller")
Fixes: ea89fdf24fd9 ("arm64: dts: exynos: google: Add initial Google gs101 SoC support")
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
arch/arm64/boot/dts/exynos/google/gs101.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index d1e3226da6472bb9db766926100a6b9855d7a30c..1ae965e456665bf05aa1b08269b5dd66b46d200b 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -288,7 +288,7 @@ soc: soc@0 {
cmu_misc: clock-controller@10010000 {
compatible = "google,gs101-cmu-misc";
- reg = <0x10010000 0x8000>;
+ reg = <0x10010000 0x10000>;
#clock-cells = <1>;
clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>,
<&cmu_top CLK_DOUT_CMU_MISC_SSS>;
@@ -371,7 +371,7 @@ ppi_cluster2: interrupt-partition-2 {
cmu_peric0: clock-controller@10800000 {
compatible = "google,gs101-cmu-peric0";
- reg = <0x10800000 0x4000>;
+ reg = <0x10800000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>,
<&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
@@ -917,7 +917,7 @@ spi_14: spi@10a20000 {
cmu_peric1: clock-controller@10c00000 {
compatible = "google,gs101-cmu-peric1";
- reg = <0x10c00000 0x4000>;
+ reg = <0x10c00000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>,
<&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
@@ -1271,7 +1271,7 @@ spi_13: spi@10d60000 {
cmu_hsi0: clock-controller@11000000 {
compatible = "google,gs101-cmu-hsi0";
- reg = <0x11000000 0x4000>;
+ reg = <0x11000000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>,
@@ -1344,7 +1344,7 @@ pinctrl_hsi1: pinctrl@11840000 {
cmu_hsi2: clock-controller@14400000 {
compatible = "google,gs101-cmu-hsi2";
- reg = <0x14400000 0x4000>;
+ reg = <0x14400000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>,
<&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
@@ -1407,7 +1407,7 @@ ufs_0_phy: phy@14704000 {
cmu_apm: clock-controller@17400000 {
compatible = "google,gs101-cmu-apm";
- reg = <0x17400000 0x8000>;
+ reg = <0x17400000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>;
@@ -1509,7 +1509,7 @@ pinctrl_gsacore: pinctrl@17a80000 {
cmu_top: clock-controller@1e080000 {
compatible = "google,gs101-cmu-top";
- reg = <0x1e080000 0x8000>;
+ reg = <0x1e080000 0x10000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>;
--
2.51.0.760.g7b8bcc2412-goog