On Fri, Oct 10, 2025 at 07:01:10PM +0800, Xu Yang wrote:
> Beside default 24MHz clock input, there is an optional additional 100Mhz
> clock input 'alt' for USB PHY reference clock.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
>
> ---
> Changes in v2:
> - improve commit message
> ---
> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml
> index 6a47e08e0e97b286538798190225ca2966a7ab34..081deb502e21308970a9495528bd745b9085f2f0 100644
> --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml
> @@ -27,11 +27,16 @@ properties:
> const: 0
>
> clocks:
> - maxItems: 1
> + minItems: 1
> + items:
> + - description: PHY configuration clock
> + - description: Alternate PHY reference clock
>
> clock-names:
> + minItems: 1
> items:
> - const: phy
> + - const: alt
>
> power-domains:
> maxItems: 1
>
> --
> 2.34.1
>