On Wednesday, October 8, 2025 4:30 PM Svyatoslav Ryhel wrote:
> Expand supported formats structure with data_type and bit_width fields
> required for CSI support. Adjust tegra20_fmt_align by factoring out common
> bytesperline and sizeimage calculation logic shared by supported planar
> and non-planar formats and leaving planar-related correction under a
> switch.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> drivers/staging/media/tegra-video/tegra20.c | 39 ++++++++++-----------
> 1 file changed, 19 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c
> index 7c3ff843235d..ffaaa2bb8269 100644
> --- a/drivers/staging/media/tegra-video/tegra20.c
> +++ b/drivers/staging/media/tegra-video/tegra20.c
> @@ -280,18 +280,13 @@ static void tegra20_fmt_align(struct v4l2_pix_format *pix, unsigned int bpp)
> pix->width = clamp(pix->width, TEGRA20_MIN_WIDTH, TEGRA20_MAX_WIDTH);
> pix->height = clamp(pix->height, TEGRA20_MIN_HEIGHT, TEGRA20_MAX_HEIGHT);
>
> + pix->bytesperline = roundup(pix->width, 8) * bpp;
> + pix->sizeimage = pix->bytesperline * pix->height;
> +
> switch (pix->pixelformat) {
> - case V4L2_PIX_FMT_UYVY:
> - case V4L2_PIX_FMT_VYUY:
> - case V4L2_PIX_FMT_YUYV:
> - case V4L2_PIX_FMT_YVYU:
> - pix->bytesperline = roundup(pix->width, 2) * 2;
> - pix->sizeimage = roundup(pix->width, 2) * 2 * pix->height;
> - break;
> case V4L2_PIX_FMT_YUV420:
> case V4L2_PIX_FMT_YVU420:
> - pix->bytesperline = roundup(pix->width, 8);
> - pix->sizeimage = roundup(pix->width, 8) * pix->height * 3 / 2;
> + pix->sizeimage = pix->sizeimage * 3 / 2;
> break;
> }
> }
> @@ -576,20 +571,24 @@ static const struct tegra_vi_ops tegra20_vi_ops = {
> .vi_stop_streaming = tegra20_vi_stop_streaming,
> };
>
> -#define TEGRA20_VIDEO_FMT(MBUS_CODE, BPP, FOURCC) \
> -{ \
> - .code = MEDIA_BUS_FMT_##MBUS_CODE, \
> - .bpp = BPP, \
> - .fourcc = V4L2_PIX_FMT_##FOURCC, \
> +#define TEGRA20_VIDEO_FMT(DATA_TYPE, BIT_WIDTH, MBUS_CODE, BPP, FOURCC) \
> +{ \
> + .img_dt = TEGRA_IMAGE_DT_##DATA_TYPE, \
> + .bit_width = BIT_WIDTH, \
> + .code = MEDIA_BUS_FMT_##MBUS_CODE, \
> + .bpp = BPP, \
> + .fourcc = V4L2_PIX_FMT_##FOURCC, \
> }
>
> static const struct tegra_video_format tegra20_video_formats[] = {
> - TEGRA20_VIDEO_FMT(UYVY8_2X8, 2, UYVY),
> - TEGRA20_VIDEO_FMT(VYUY8_2X8, 2, VYUY),
> - TEGRA20_VIDEO_FMT(YUYV8_2X8, 2, YUYV),
> - TEGRA20_VIDEO_FMT(YVYU8_2X8, 2, YVYU),
> - TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YUV420),
> - TEGRA20_VIDEO_FMT(UYVY8_2X8, 1, YVU420),
> + /* YUV422 */
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 2, UYVY),
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, VYUY8_2X8, 2, VYUY),
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, YUYV8_2X8, 2, YUYV),
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, YVYU8_2X8, 2, YVYU),
> + /* YUV420P */
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 1, YUV420),
> + TEGRA20_VIDEO_FMT(YUV422_8, 16, UYVY8_2X8, 1, YVU420),
> };
>
> const struct tegra_vi_soc tegra20_vi_soc = {
>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>