The UFS device is ovbiously dma coherent like the other IOMMU devices
like usb, mmc, ... let's fix this by adding the flag.

To be sure an extensive test has been performed to be sure it's
safe, as downstream uses this flag for UFS as well.

As an experiment, I checked how the dma-coherent could impact
the UFS bandwidth, and it happens the max bandwidth on cached
write is slighly highter (up to 10%) while using less cpu time
since cache sync/flush is skipped.

Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index e14d3d778b71bbbd0c8fcc851eebc9df9ac09c31..d7ed45027ff453a2d7988678c9e9568837a1c086 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -4020,6 +4020,8 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 
 			iommus = <&apps_smmu 0x60 0>;
 
+			dma-coherent;
+
 			lanes-per-direction = <2>;
 			qcom,ice = <&ice>;
 

---
base-commit: e5f0a698b34ed76002dc5cff3804a61c80233a7a
change-id: 20251007-topic-sm8650-upstream-ufs-dma-coherent-6c0da5febe16

Best regards,
-- 
Neil Armstrong <neil.armstrong@linaro.org>

On Tue, 07 Oct 2025 20:53:44 +0200, Neil Armstrong wrote:
> The UFS device is ovbiously dma coherent like the other IOMMU devices
> like usb, mmc, ... let's fix this by adding the flag.
> 
> To be sure an extensive test has been performed to be sure it's
> safe, as downstream uses this flag for UFS as well.
> 
> As an experiment, I checked how the dma-coherent could impact
> the UFS bandwidth, and it happens the max bandwidth on cached
> write is slighly highter (up to 10%) while using less cpu time
> since cache sync/flush is skipped.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: qcom: sm8650: set ufs as dma coherent
      commit: c2703c90161b45bca5b65f362adbae02ed71fcc1

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>

On 08/10/2025 03:53, Neil Armstrong wrote:
> The UFS device is ovbiously dma coherent like the other IOMMU devices
> like usb, mmc, ... let's fix this by adding the flag.
> 
> To be sure an extensive test has been performed to be sure it's
> safe, as downstream uses this flag for UFS as well.
> 
> As an experiment, I checked how the dma-coherent could impact
> the UFS bandwidth, and it happens the max bandwidth on cached
> write is slighly highter (up to 10%) while using less cpu time
> since cache sync/flush is skipped.
> 
> Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

On Tue, Oct 07, 2025 at 08:53:44PM +0200, Neil Armstrong wrote:
> The UFS device is ovbiously dma coherent like the other IOMMU devices
> like usb, mmc, ... let's fix this by adding the flag.
> 
> To be sure an extensive test has been performed to be sure it's
> safe, as downstream uses this flag for UFS as well.
> 
> As an experiment, I checked how the dma-coherent could impact
> the UFS bandwidth, and it happens the max bandwidth on cached
> write is slighly highter (up to 10%) while using less cpu time
> since cache sync/flush is skipped.
> 
> Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes")
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry