arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 10 ++++++++++ arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+)
Add EIP76 Random Number Generator (RNG) node within crypto engine for
AM62 and AM62A SoCs. The RNG hardware is integrated in crypto
subsystem at address 0x40910000.
Mark the RNG node with status "reserved" as it is intended for use by
OP-TEE for secure random number generation. If required, this hardware
can also be used through Linux kernel by enabling this node.
Signed-off-by: Shiva Tripathi <s-tripathi1@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 10 ++++++++++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 10 ++++++++++
2 files changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index 40fb3c9e674c..00148a5ebaa6 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -209,6 +209,16 @@ crypto: crypto@40900000 {
dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
<&main_pktdma 0x7507 0>;
dma-names = "tx", "rx1", "rx2";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+
+ rng: rng@40910000 {
+ compatible = "inside-secure,safexcel-eip76";
+ reg = <0x00 0x40910000 0x00 0x7d>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ status = "reserved"; /* Reserved for OP-TEE */
+ };
};
secure_proxy_sa3: mailbox@43600000 {
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 829f00adea6e..9e5b75a4e88e 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -247,6 +247,16 @@ crypto: crypto@40900000 {
dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
<&main_pktdma 0x7507 0>;
dma-names = "tx", "rx1", "rx2";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+
+ rng: rng@40910000 {
+ compatible = "inside-secure,safexcel-eip76";
+ reg = <0x00 0x40910000 0x00 0x7d>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ status = "reserved"; /* Reserved for OP-TEE */
+ };
};
secure_proxy_sa3: mailbox@43600000 {
--
2.34.1
Hi Shiva Tripathi,
On Fri, 26 Sep 2025 15:32:29 +0530, Shiva Tripathi wrote:
> Add EIP76 Random Number Generator (RNG) node within crypto engine for
> AM62 and AM62A SoCs. The RNG hardware is integrated in crypto
> subsystem at address 0x40910000.
>
> Mark the RNG node with status "reserved" as it is intended for use by
> OP-TEE for secure random number generation. If required, this hardware
> can also be used through Linux kernel by enabling this node.
>
> [...]
I have applied the following to branch ti-next on [1].
Thank you!
[1/1] arm64: dts: ti: k3-am62: Add RNG node
commit: 67106d217170161383b22c964192448a46fd13fc
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
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