[v1] Add support for ExynosAutov920 PCIe PHY

[PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC

Posted by Sanghoon Bae 4 months, 2 weeks ago

Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
for it in the Exynosautov920 PCIe PHY bindings.

The Exynosautov920 SoC includes two PHY instances: one for a 4-lane PHY
and another for a 2-lane PHY. Each PHY can be used by separate
controllers through the bifurcation option. Therefore, from 2 up to 4
PCIe controllers can be supported and connected with this PHY driver.

PCIe lane number is used to distinguish each PHY instance.
This is required since two PHY instances on ExynosAutov920 is not
identical.
On PHY driver code, need to check each instance and different settings.

Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com>
---
 .../bindings/phy/samsung,exynos-pcie-phy.yaml      | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
index 6295472696db..1e8b88d2cd56 100644
--- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
@@ -19,6 +19,7 @@ properties:
       - samsung,exynos5433-pcie-phy
       - tesla,fsd-pcie-phy0
       - tesla,fsd-pcie-phy1
+      - samsung,exynosautov920-pcie-phy
 
   reg:
     minItems: 1
@@ -34,6 +35,10 @@ properties:
     description: phandle for FSYS sysreg interface, used to control
                  sysreg registers bits for PCIe PHY
 
+  num-lanes:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [2, 4]
+
 allOf:
   - if:
       properties:
@@ -42,6 +47,7 @@ allOf:
             enum:
               - tesla,fsd-pcie-phy0
               - tesla,fsd-pcie-phy1
+              - samsung,exynosautov920-pcie-phy
     then:
       properties:
         reg:
@@ -52,6 +58,14 @@ allOf:
       properties:
         reg:
           maxItems: 1
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov920-pcie-phy
+    then:
+      required:
+        - num-lanes
 
 required:
   - "#phy-cells"
-- 
2.45.2

Re: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC

Posted by Krzysztof Kozlowski 4 months ago

On 26/09/2025 16:39, Sanghoon Bae wrote:
> Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
> for it in the Exynosautov920 PCIe PHY bindings.
> 
> The Exynosautov920 SoC includes two PHY instances: one for a 4-lane PHY
> and another for a 2-lane PHY. Each PHY can be used by separate
> controllers through the bifurcation option. Therefore, from 2 up to 4
> PCIe controllers can be supported and connected with this PHY driver.


Describe hardware, not driver.

> 
> PCIe lane number is used to distinguish each PHY instance.
> This is required since two PHY instances on ExynosAutov920 is not
> identical.
> On PHY driver code, need to check each instance and different settings.


Describe hardware, not driver.

> 
> Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com>
> ---
>  .../bindings/phy/samsung,exynos-pcie-phy.yaml      | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 6295472696db..1e8b88d2cd56 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -19,6 +19,7 @@ properties:
>        - samsung,exynos5433-pcie-phy
>        - tesla,fsd-pcie-phy0
>        - tesla,fsd-pcie-phy1
> +      - samsung,exynosautov920-pcie-phy

Messed order.

>  
>    reg:
>      minItems: 1
> @@ -34,6 +35,10 @@ properties:
>      description: phandle for FSYS sysreg interface, used to control
>                   sysreg registers bits for PCIe PHY
>  
> +  num-lanes:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [2, 4]
> +
>  allOf:
>    - if:
>        properties:
> @@ -42,6 +47,7 @@ allOf:
>              enum:
>                - tesla,fsd-pcie-phy0
>                - tesla,fsd-pcie-phy1
> +              - samsung,exynosautov920-pcie-phy

Messed order.

Best regards,
Krzysztof

RE: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC

Posted by Sanghoon Bae 2 months, 3 weeks ago

> > Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
> > for it in the Exynosautov920 PCIe PHY bindings.
> >
> > The Exynosautov920 SoC includes two PHY instances: one for a 4-lane
> > PHY and another for a 2-lane PHY. Each PHY can be used by separate
> > controllers through the bifurcation option. Therefore, from 2 up to 4
> > PCIe controllers can be supported and connected with this PHY driver.
> 
> 
> Describe hardware, not driver.
I will describe about the Exynosautov920 SoC PCIe hardware.

> > PCIe lane number is used to distinguish each PHY instance.
> > This is required since two PHY instances on ExynosAutov920 is not
> > identical.
> > On PHY driver code, need to check each instance and different settings.
> 
> 
> Describe hardware, not driver.
I will describe about the Exynosautov920 SoC PCIe hardware.

> > @@ -19,6 +19,7 @@ properties:
> >        - samsung,exynos5433-pcie-phy
> >        - tesla,fsd-pcie-phy0
> >        - tesla,fsd-pcie-phy1
> > +      - samsung,exynosautov920-pcie-phy
> 
> Messed order.
Will fix the order

> > @@ -42,6 +47,7 @@ allOf:
> >              enum:
> >                - tesla,fsd-pcie-phy0
> >                - tesla,fsd-pcie-phy1
> > +              - samsung,exynosautov920-pcie-phy
> 
> Messed order.
Will fix the order