.../devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm
Glymur SoCs. It is software compatible with X1E80100 CPUCP mailbox
controller hence fallback to it.
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
---
.../devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
index f7342d04beec..9122c3d2dc30 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
@@ -15,8 +15,13 @@ description:
properties:
compatible:
- items:
- - const: qcom,x1e80100-cpucp-mbox
+ oneOf:
+ - items:
+ - enum:
+ - qcom,glymur-cpucp-mbox
+ - const: qcom,x1e80100-cpucp-mbox
+ - enum:
+ - qcom,x1e80100-cpucp-mbox
reg:
items:
--
2.34.1
On 24/09/2025 23:48, Sibi Sankar wrote: > Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm > Glymur SoCs. It is software compatible with X1E80100 CPUCP mailbox > controller hence fallback to it. > > Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> This should be squashed with Kaanapali. Commit msg is the same. Contents is the same. This entire split is just huge churn, huge duplication of work and quite a lot of review put onto the community. You should have coordinated your work better. I am dissapointed because you just don't think about the reviewing process, about what maintainers should do with that. You just send what was told you to send. Explain to us - why do we want to have two 99% same patches sent the SAME DAY from the same company and do same work - review and applying - twice, instead of having only one? Why maintainers should accept this? Best regards, Krzysztof
On Wed, 24 Sep 2025 20:18:31 +0530, Sibi Sankar wrote: > Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm > Glymur SoCs. It is software compatible with X1E80100 CPUCP mailbox > controller hence fallback to it. > > Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> > --- > .../devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > Acked-by: Rob Herring (Arm) <robh@kernel.org>
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