From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
Add Device Tree binding documentation for the Eswin EIC7700 PCIe
controller module, the PCIe controller enables the core to correctly
initialize and manage the PCIe bus and connected devices.
Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
---
.../bindings/pci/eswin,eic7700-pcie.yaml | 173 ++++++++++++++++++
1 file changed, 173 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
new file mode 100644
index 000000000000..2f105d09e38e
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
@@ -0,0 +1,173 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 PCIe host controller
+
+maintainers:
+ - Yu Ning <ningyu@eswincomputing.com>
+ - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
+ - Yanghui Ou <ouyanghui@eswincomputing.com>
+
+description:
+ The PCIe controller on EIC7700 SoC.
+
+allOf:
+ - $ref: /schemas/pci/pci-host-bridge.yaml#
+
+properties:
+ compatible:
+ const: eswin,eic7700-pcie
+
+ reg:
+ maxItems: 3
+
+ reg-names:
+ items:
+ - const: dbi
+ - const: config
+ - const: mgmt
+
+ ranges:
+ maxItems: 3
+
+ num-lanes:
+ maximum: 4
+
+ '#interrupt-cells':
+ const: 1
+
+ interrupts:
+ maxItems: 9
+
+ interrupt-names:
+ items:
+ - const: msi
+ - const: inta # Assert_INTA
+ - const: intb # Assert_INTB
+ - const: intc # Assert_INTC
+ - const: intd # Assert_INTD
+ - const: inte # Desassert_INTA
+ - const: intf # Desassert_INTB
+ - const: intg # Desassert_INTC
+ - const: inth # Desassert_INTD
+
+ interrupt-map:
+ maxItems: 4
+
+ interrupt-map-mask:
+ items:
+ - const: 0
+ - const: 0
+ - const: 0
+ - const: 7
+
+ clocks:
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: mstr
+ - const: dbi
+ - const: pclk
+ - const: aux
+
+ resets:
+ maxItems: 2
+
+ reset-names:
+ items:
+ - const: cfg
+ - const: powerup
+
+patternProperties:
+ "^pcie@":
+ type: object
+ $ref: /schemas/pci/pci-pci-bridge.yaml#
+
+ properties:
+ reg:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: perst
+
+ required:
+ - reg
+ - ranges
+ - resets
+ - reset-names
+
+ unevaluatedProperties: false
+
+required:
+ - compatible
+ - reg
+ - ranges
+ - interrupts
+ - interrupt-names
+ - interrupt-map-mask
+ - interrupt-map
+ - '#interrupt-cells'
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ pcie@54000000 {
+ compatible = "eswin,eic7700-pcie";
+ reg = <0x0 0x54000000 0x0 0x4000000>,
+ <0x0 0x40000000 0x0 0x800000>,
+ <0x0 0x50000000 0x0 0x100000>;
+ reg-names = "dbi", "config", "mgmt";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
+ <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
+ <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
+ bus-range = <0x00 0xff>;
+ clocks = <&clock 203>,
+ <&clock 204>,
+ <&clock 205>,
+ <&clock 206>;
+ clock-names = "mstr", "dbi", "pclk", "aux";
+ resets = <&reset 97>,
+ <&reset 98>;
+ reset-names = "cfg", "powerup";
+ interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
+ interrupt-names = "msi", "inta", "intb", "intc", "intd",
+ "inte", "intf", "intg", "inth";
+ interrupt-parent = <&plic>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
+ <0x0 0x0 0x0 0x2 &plic 180>,
+ <0x0 0x0 0x0 0x3 &plic 181>,
+ <0x0 0x0 0x0 0x4 &plic 182>;
+ device_type = "pci";
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ device_type = "pci";
+ num-lanes = <4>;
+ resets = <&reset 99>;
+ reset-names = "perst";
+ };
+ };
+ };
--
2.25.1On Tue, Sep 23, 2025 at 08:12:00PM +0800, zhangsenchuan@eswincomputing.com wrote:
> From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
>
> Add Device Tree binding documentation for the Eswin EIC7700 PCIe
> controller module, the PCIe controller enables the core to correctly
> initialize and manage the PCIe bus and connected devices.
>
> Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> ---
> .../bindings/pci/eswin,eic7700-pcie.yaml | 173 ++++++++++++++++++
> 1 file changed, 173 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> new file mode 100644
> index 000000000000..2f105d09e38e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> @@ -0,0 +1,173 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 PCIe host controller
> +
> +maintainers:
> + - Yu Ning <ningyu@eswincomputing.com>
> + - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> + - Yanghui Ou <ouyanghui@eswincomputing.com>
> +
> +description:
> + The PCIe controller on EIC7700 SoC.
> +
> +allOf:
> + - $ref: /schemas/pci/pci-host-bridge.yaml#
In drivers, you put drivers/pci/controller/dwc/pcie-eic7700.c under dwc,
suppose it is dwc core.
so it should refer to snps,dw-pcie.yaml.
If reg-names or interrupt-names don't match your requirement, please update
snps,dw-pcie.yaml in case difference vendor use difference name for the
same functions.
Frank
> +
> +properties:
> + compatible:
> + const: eswin,eic7700-pcie
> +
> + reg:
> + maxItems: 3
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: config
> + - const: mgmt
> +
> + ranges:
> + maxItems: 3
> +
> + num-lanes:
> + maximum: 4
> +
> + '#interrupt-cells':
> + const: 1
> +
> + interrupts:
> + maxItems: 9
> +
> + interrupt-names:
> + items:
> + - const: msi
> + - const: inta # Assert_INTA
> + - const: intb # Assert_INTB
> + - const: intc # Assert_INTC
> + - const: intd # Assert_INTD
> + - const: inte # Desassert_INTA
> + - const: intf # Desassert_INTB
> + - const: intg # Desassert_INTC
> + - const: inth # Desassert_INTD
> +
> + interrupt-map:
> + maxItems: 4
> +
> + interrupt-map-mask:
> + items:
> + - const: 0
> + - const: 0
> + - const: 0
> + - const: 7
> +
> + clocks:
> + maxItems: 4
> +
> + clock-names:
> + items:
> + - const: mstr
> + - const: dbi
> + - const: pclk
> + - const: aux
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: cfg
> + - const: powerup
> +
> +patternProperties:
> + "^pcie@":
> + type: object
> + $ref: /schemas/pci/pci-pci-bridge.yaml#
> +
> + properties:
> + reg:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: perst
> +
> + required:
> + - reg
> + - ranges
> + - resets
> + - reset-names
> +
> + unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - ranges
> + - interrupts
> + - interrupt-names
> + - interrupt-map-mask
> + - interrupt-map
> + - '#interrupt-cells'
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie@54000000 {
> + compatible = "eswin,eic7700-pcie";
> + reg = <0x0 0x54000000 0x0 0x4000000>,
> + <0x0 0x40000000 0x0 0x800000>,
> + <0x0 0x50000000 0x0 0x100000>;
> + reg-names = "dbi", "config", "mgmt";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
> + <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
> + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
> + bus-range = <0x00 0xff>;
> + clocks = <&clock 203>,
> + <&clock 204>,
> + <&clock 205>,
> + <&clock 206>;
> + clock-names = "mstr", "dbi", "pclk", "aux";
> + resets = <&reset 97>,
> + <&reset 98>;
> + reset-names = "cfg", "powerup";
> + interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
> + interrupt-names = "msi", "inta", "intb", "intc", "intd",
> + "inte", "intf", "intg", "inth";
> + interrupt-parent = <&plic>;
> + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> + interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
> + <0x0 0x0 0x0 0x2 &plic 180>,
> + <0x0 0x0 0x0 0x3 &plic 181>,
> + <0x0 0x0 0x0 0x4 &plic 182>;
> + device_type = "pci";
> + pcie@0 {
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + device_type = "pci";
> + num-lanes = <4>;
> + resets = <&reset 99>;
> + reset-names = "perst";
> + };
> + };
> + };
> --
> 2.25.1
>
On Tue, Sep 23, 2025 at 08:12:00PM +0800, zhangsenchuan@eswincomputing.com wrote:
> From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
>
> Add Device Tree binding documentation for the Eswin EIC7700 PCIe
> controller module, the PCIe controller enables the core to correctly
> initialize and manage the PCIe bus and connected devices.
>
> Signed-off-by: Yu Ning <ningyu@eswincomputing.com>
> Signed-off-by: Yanghui Ou <ouyanghui@eswincomputing.com>
> Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> ---
> .../bindings/pci/eswin,eic7700-pcie.yaml | 173 ++++++++++++++++++
> 1 file changed, 173 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
>
> diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> new file mode 100644
> index 000000000000..2f105d09e38e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml
> @@ -0,0 +1,173 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 PCIe host controller
> +
> +maintainers:
> + - Yu Ning <ningyu@eswincomputing.com>
> + - Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> + - Yanghui Ou <ouyanghui@eswincomputing.com>
> +
> +description:
> + The PCIe controller on EIC7700 SoC.
> +
> +allOf:
> + - $ref: /schemas/pci/pci-host-bridge.yaml#
suggest move it after required, incase add if-else in future.
Frank
> +
> +properties:
> + compatible:
> + const: eswin,eic7700-pcie
> +
> + reg:
> + maxItems: 3
> +
> + reg-names:
> + items:
> + - const: dbi
> + - const: config
> + - const: mgmt
> +
> + ranges:
> + maxItems: 3
> +
> + num-lanes:
> + maximum: 4
> +
> + '#interrupt-cells':
> + const: 1
> +
> + interrupts:
> + maxItems: 9
> +
> + interrupt-names:
> + items:
> + - const: msi
> + - const: inta # Assert_INTA
> + - const: intb # Assert_INTB
> + - const: intc # Assert_INTC
> + - const: intd # Assert_INTD
> + - const: inte # Desassert_INTA
> + - const: intf # Desassert_INTB
> + - const: intg # Desassert_INTC
> + - const: inth # Desassert_INTD
> +
> + interrupt-map:
> + maxItems: 4
> +
> + interrupt-map-mask:
> + items:
> + - const: 0
> + - const: 0
> + - const: 0
> + - const: 7
> +
> + clocks:
> + maxItems: 4
> +
> + clock-names:
> + items:
> + - const: mstr
> + - const: dbi
> + - const: pclk
> + - const: aux
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: cfg
> + - const: powerup
> +
> +patternProperties:
> + "^pcie@":
> + type: object
> + $ref: /schemas/pci/pci-pci-bridge.yaml#
> +
> + properties:
> + reg:
> + maxItems: 1
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: perst
> +
> + required:
> + - reg
> + - ranges
> + - resets
> + - reset-names
> +
> + unevaluatedProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - ranges
> + - interrupts
> + - interrupt-names
> + - interrupt-map-mask
> + - interrupt-map
> + - '#interrupt-cells'
> + - clocks
> + - clock-names
> + - resets
> + - reset-names
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + pcie@54000000 {
> + compatible = "eswin,eic7700-pcie";
> + reg = <0x0 0x54000000 0x0 0x4000000>,
> + <0x0 0x40000000 0x0 0x800000>,
> + <0x0 0x50000000 0x0 0x100000>;
> + reg-names = "dbi", "config", "mgmt";
> + #address-cells = <3>;
> + #size-cells = <2>;
> + #interrupt-cells = <1>;
> + ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>,
> + <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>,
> + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>;
> + bus-range = <0x00 0xff>;
> + clocks = <&clock 203>,
> + <&clock 204>,
> + <&clock 205>,
> + <&clock 206>;
> + clock-names = "mstr", "dbi", "pclk", "aux";
> + resets = <&reset 97>,
> + <&reset 98>;
> + reset-names = "cfg", "powerup";
> + interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>;
> + interrupt-names = "msi", "inta", "intb", "intc", "intd",
> + "inte", "intf", "intg", "inth";
> + interrupt-parent = <&plic>;
> + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
> + interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>,
> + <0x0 0x0 0x0 0x2 &plic 180>,
> + <0x0 0x0 0x0 0x3 &plic 181>,
> + <0x0 0x0 0x0 0x4 &plic 182>;
> + device_type = "pci";
> + pcie@0 {
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
> + device_type = "pci";
> + num-lanes = <4>;
> + resets = <&reset 99>;
> + reset-names = "perst";
> + };
> + };
> + };
> --
> 2.25.1
>
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