From: Hermes Wu <Hermes.wu@ite.com.tw>
When start link training, interrupt status INT_LINK_TRAIN_FAIL can use to
check link training fail and no need to wait until timeout.
it6505_irq_link_train_fail() remove from interrupt and no longer used.
IT6505 HW auto link training which will write DPCD and check training
status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock is changed.
When video error occurs, video logic is reset and link training restart,
this will cause endless auto link training.
when start link auto training, disable INT_VID_FIFO_ERROR to avoid loop
and check INT_LINK_TRAIN_FAIL event to abort wait training done.
Signed-off-by: Hermes Wu <Hermes.wu@ite.com.tw>
---
drivers/gpu/drm/bridge/ite-it6505.c | 38 ++++++++++++++++++++++++++-----------
1 file changed, 27 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c
index b47042dc06bb1e1dfd92bc0dc6d69dc918a140ba..f9b99c70789eea6beb3c6513155c9a4ca103d219 100644
--- a/drivers/gpu/drm/bridge/ite-it6505.c
+++ b/drivers/gpu/drm/bridge/ite-it6505.c
@@ -821,8 +821,8 @@ static void it6505_int_mask_enable(struct it6505 *it6505)
it6505_write(it6505, INT_MASK_02, BIT(INT_AUX_CMD_FAIL) |
BIT(INT_HDCP_KSV_CHECK) | BIT(INT_AUDIO_FIFO_ERROR));
- it6505_write(it6505, INT_MASK_03, BIT(INT_LINK_TRAIN_FAIL) |
- BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW));
+ it6505_write(it6505, INT_MASK_03, BIT(INT_VID_FIFO_ERROR) |
+ BIT(INT_IO_LATCH_FIFO_OVERFLOW));
}
static void it6505_int_mask_disable(struct it6505 *it6505)
@@ -1802,8 +1802,17 @@ static bool it6505_link_start_auto_train(struct it6505 *it6505)
{
int timeout = 500, link_training_state;
bool state = false;
+ int int03;
+ struct device *dev = it6505->dev;
mutex_lock(&it6505->aux_lock);
+
+ /* Disable FIFO error interrupt trigger */
+ /* to prevent training fail loop issue */
+ it6505_set_bits(it6505, INT_MASK_03, BIT(INT_VID_FIFO_ERROR), 0);
+
+ it6505_write(it6505, INT_STATUS_03,
+ BIT(INT_LINK_TRAIN_FAIL) | BIT(INT_VID_FIFO_ERROR));
it6505_set_bits(it6505, REG_TRAIN_CTRL0,
FORCE_CR_DONE | FORCE_EQ_DONE, 0x00);
/* reset link state machine and re start training*/
@@ -1814,6 +1823,19 @@ static bool it6505_link_start_auto_train(struct it6505 *it6505)
while (timeout > 0) {
usleep_range(1000, 2000);
link_training_state = it6505_read(it6505, REG_LINK_TRAIN_STS);
+ int03 = it6505_read(it6505, INT_STATUS_03);
+ if (int03 & BIT(INT_LINK_TRAIN_FAIL)) {
+ /* Ignore INT_VID_FIFO_ERROR when auto training fail*/
+ it6505_write(it6505, INT_STATUS_03,
+ BIT(INT_LINK_TRAIN_FAIL) |
+ BIT(INT_VID_FIFO_ERROR));
+
+ DRM_DEV_DEBUG_DRIVER(dev,
+ "INT_LINK_TRAIN_FAIL(%x)!",
+ int03);
+
+ break;
+ }
if (link_training_state > 0 &&
(link_training_state & LINK_STATE_NORP)) {
@@ -1824,6 +1846,9 @@ static bool it6505_link_start_auto_train(struct it6505 *it6505)
timeout--;
}
unlock:
+ /* recover interrupt trigger*/
+ it6505_set_bits(it6505, INT_MASK_03,
+ BIT(INT_VID_FIFO_ERROR), BIT(INT_VID_FIFO_ERROR));
mutex_unlock(&it6505->aux_lock);
return state;
@@ -2693,14 +2718,6 @@ static void it6505_irq_audio_fifo_error(struct it6505 *it6505)
it6505_enable_audio(it6505);
}
-static void it6505_irq_link_train_fail(struct it6505 *it6505)
-{
- struct device *dev = it6505->dev;
-
- DRM_DEV_DEBUG_DRIVER(dev, "link training fail interrupt");
- schedule_work(&it6505->link_works);
-}
-
static bool it6505_test_bit(unsigned int bit, const unsigned int *addr)
{
return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE));
@@ -2765,7 +2782,6 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data)
{ BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail },
{ BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check },
{ BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error },
- { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail },
};
int int_status[3], i;
--
2.34.1On Tue, Sep 23, 2025 at 02:23:42PM +0800, Hermes Wu via B4 Relay wrote: > From: Hermes Wu <Hermes.wu@ite.com.tw> > > When start link training, interrupt status INT_LINK_TRAIN_FAIL can use to > check link training fail and no need to wait until timeout. > > it6505_irq_link_train_fail() remove from interrupt and no longer used. > > IT6505 HW auto link training which will write DPCD and check training > status automatically. > > In the case that driver set link rate at 2.7G and HW fail to training, > it will change link configuration and try 1.65G. And this will cause > INT_VID_FIFO_ERROR triggered when link clock is changed. > > When video error occurs, video logic is reset and link training restart, > this will cause endless auto link training. > > when start link auto training, disable INT_VID_FIFO_ERROR to avoid loop > and check INT_LINK_TRAIN_FAIL event to abort wait training done. > > Signed-off-by: Hermes Wu <Hermes.wu@ite.com.tw> > --- > drivers/gpu/drm/bridge/ite-it6505.c | 38 ++++++++++++++++++++++++++----------- > 1 file changed, 27 insertions(+), 11 deletions(-) > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> -- With best wishes Dmitry
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