Describe the two SFP+ cages found on the LX2160ARDB board with their
respective I2C buses and GPIO lines.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
Changes in v2:
- none
Changes in v3:
- Moved the reg property before address/cells-size.
Changes in v4:
- none
Changes in v5:
- none
.../boot/dts/freescale/fsl-lx2160a-rdb.dts | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 4ede1295f29d..1c1ed0c5f016 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -31,6 +31,28 @@ sb_3v3: regulator-sb3v3 {
regulator-boot-on;
regulator-always-on;
};
+
+ sfp2: sfp-2 {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfp2_i2c>;
+ maximum-power-milliwatt = <2000>;
+ /* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
+ /* tx-disable-gpios = <&sfp2_csr 0 GPIO_ACTIVE_HIGH>; */
+ los-gpios = <&sfp2_csr 4 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&sfp2_csr 5 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&sfp2_csr 7 GPIO_ACTIVE_LOW>;
+ };
+
+ sfp3: sfp-3 {
+ compatible = "sff,sfp";
+ i2c-bus = <&sfp3_i2c>;
+ maximum-power-milliwatt = <2000>;
+ /* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
+ /* tx-disable-gpios = <&sfp3_csr 0 GPIO_ACTIVE_HIGH>; */
+ los-gpios = <&sfp3_csr 4 GPIO_ACTIVE_HIGH>;
+ tx-fault-gpios = <&sfp3_csr 5 GPIO_ACTIVE_HIGH>;
+ mod-def0-gpios = <&sfp3_csr 7 GPIO_ACTIVE_LOW>;
+ };
};
&crypto {
@@ -236,6 +258,31 @@ temperature-sensor@4d {
vcc-supply = <&sb_3v3>;
};
};
+
+ i2c@7 {
+ reg = <0x7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-mux@75 {
+ compatible = "nxp,pca9547";
+ reg = <0x75>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sfp2_i2c: i2c@4 {
+ reg = <0x4>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ sfp3_i2c: i2c@5 {
+ reg = <0x5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
};
};
--
2.25.1