The first SoC in the Anlogic series is DR1V90, which contains a RISC-V
core from Nuclei.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
arch/riscv/Kconfig.socs | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 61ceae0aa27a6fa3a91da6a46becfd96da99fd09..c1c0681f4364647477c50518725d9323922ff270 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -7,6 +7,11 @@ config ARCH_ANDES
help
This enables support for Andes SoC platform hardware.
+config ARCH_ANLOGIC
+ bool "Anlogic SoCs"
+ help
+ This enables support for Anlogic SoC platform hardware.
+
config ARCH_MICROCHIP_POLARFIRE
def_bool ARCH_MICROCHIP
--
2.51.0