Add myself as the maintainer of the Anlogic DR1V90 SoC tree, including
the corresponding DTS and DT bindings paths for Anlogic RISC-V-based
SoCs.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 520fb4e379a3954ff9b163bfdfda857e5c5b99d4..44b4b4f7e53c5904f6b9076f9542866292d33fce 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21681,6 +21681,15 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git
F: Documentation/devicetree/bindings/iommu/riscv,iommu.yaml
F: drivers/iommu/riscv/
+RISC-V ANLOGIC DR1V90 SoC SUPPORT
+M: Junhui Liu <junhui.liu@pigmoral.tech>
+L: linux-riscv@lists.infradead.org
+S: Maintained
+T: git https://github.com/pigmoral/linux-dr1v90
+F: Documentation/devicetree/bindings/riscv/anlogic.yaml
+F: arch/riscv/boot/dts/anlogic/
+N: dr1v90
+
RISC-V MICROCHIP FPGA SUPPORT
M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
--
2.51.0