On 9/22/2025 6:02 PM, Wesley Cheng wrote:
>
>
> On 9/22/2025 1:14 PM, Rob Herring wrote:
>> On Fri, Sep 19, 2025 at 08:21:02PM -0700, Wesley Cheng wrote:
>>> Add the Glymur compatible to the M31 eUSB2 PHY, and use the SM8750 as
>>> the fallback.
>>>
>>> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com>
>>> ---
>>> .../devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml | 11 ++++++-----
>>> 1 file changed, 6 insertions(+), 5 deletions(-)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>>> b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>>> index c84c62d0e8cb..b96b1ee80257 100644
>>> --- a/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>>> +++ b/Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml
>>> @@ -15,9 +15,12 @@ description:
>>> properties:
>>> compatible:
>>> - items:
>>> - - enum:
>>> - - qcom,sm8750-m31-eusb2-phy
>>> + oneOf:
>>> + - items:
>>> + - enum:
>>> + - qcom,glymur-m31-eusb2-phy
>>> + - const: qcom,sm8750-m31-eusb2-phy
>>> + - const: qcom,sm8750-m31-eusb2-phy
>>> reg:
>>> maxItems: 1
>>> @@ -53,8 +56,6 @@ required:
>>> - compatible
>>> - reg
>>> - "#phy-cells"
>>> - - clocks
>>> - - clock-names
>>
>> How is it compatible if clocks aren't required now? And clocks are
>> suddenly no longer required on sm8750?
>>
>
> Hi Rob,
>
> It depends on the clock subsystem. On SM8750, we still need the clock
> entry, because we need to control the output of our CXO/reference clock
> to our HS PHY. However, on chipsets like Glymur, some HS PHYs in our
> USB subsystem doesn't have this refclk output control.
>
I've updated the bindings to keep it required for SM8750 and optional on
Glymur.
Thanks
Wesley Cheng
> Thanks
> Wesley Cheng
>
>>> - resets
>>> - vdd-supply
>>> - vdda12-supply