Add the index for a reset inside the dispcc on SM7150 SoC.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
---
 include/dt-bindings/clock/qcom,sm7150-dispcc.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/dt-bindings/clock/qcom,sm7150-dispcc.h b/include/dt-bindings/clock/qcom,sm7150-dispcc.h
index fc1fefe8fd7248bb160816cebb8cc4c51615a8dc..1e4e6432d5065b1dd3daed5b382732c9c9c09444 100644
--- a/include/dt-bindings/clock/qcom,sm7150-dispcc.h
+++ b/include/dt-bindings/clock/qcom,sm7150-dispcc.h
@@ -53,6 +53,9 @@
 #define DISPCC_SLEEP_CLK			41
 #define DISPCC_SLEEP_CLK_SRC			42
 
+/* DISPCC resets */
+#define DISPCC_MDSS_CORE_BCR			0
+
 /* DISPCC GDSCR */
 #define MDSS_GDSC				0
 

-- 
2.51.0

On Fri, 19 Sep 2025 14:34:30 +0200, Jens Reidel wrote:
> Add the index for a reset inside the dispcc on SM7150 SoC.
> 
> Signed-off-by: Jens Reidel <adrian@mainlining.org>
> ---
>  include/dt-bindings/clock/qcom,sm7150-dispcc.h | 3 +++
>  1 file changed, 3 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>