.../soc/renesas/renesas,rzn1-gpioirqmux.yaml | 87 +++++++++ arch/arm/boot/dts/renesas/r9a06g032.dtsi | 170 ++++++++++++++++++ drivers/irqchip/irq-ls-extirq.c | 47 ++--- drivers/irqchip/irq-renesas-rza1.c | 43 ++--- drivers/of/irq.c | 70 ++++++++ .../of/unittest-data/tests-interrupts.dtsi | 9 + drivers/of/unittest.c | 116 ++++++++++++ drivers/soc/renesas/Kconfig | 4 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/rzn1_irqmux.c | 110 ++++++++++++ include/linux/of_irq.h | 41 ++++- 11 files changed, 640 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml create mode 100644 drivers/soc/renesas/rzn1_irqmux.c
Hi, This series adds support for GPIO and GPIO IRQ mux available in the RZ/N1 SoCs. The first patches in this series are related to a new helper introduced to parse an interrupt-map property. - patch 1: Introduce the helper (for_each_of_imap_item) - patch 2: Add a unittest for the new helper - patch 3 and 4: convert existing drivers to use this new helper Patch 4 will conflicts with commit 40c26230a1bf ("irqchip: Use int type to store negative error codes") available in linux-next. Patch 5 adds support for GPIO (device-tree description) The last patches (6, 7 and 8) of the series are related to GPIO interrupts and GPIO IRQ multiplexer. In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer. This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96 available to wire them to the GIC input lines. One upstreaming attempt have been done previously by Phil Edworthy [1] but the series has never been applied. Based on my understanding, I have fully reworked the driver proposed by Phil and removed the IRQ domain. Indeed, the device doesn't handle interrupts. It just routes signals. Also, as an interrupt-map property is used, the driver cannot be involved as an interrupt controller itself. It is a nexus node. With that in mind, - Patch 6 is related to the irq-mux binding. - Patch 7 introduces the irq-mux driver. This driver uses the 'for_each_of_imap_item' helper introduced previously. Indeed, the lines routing is defined by the interrupt-map property and the driver needs to set registers to apply this routing. - Patch 8 is the RZ/N1 device-tree description update to have the support for the GPIO interrupts. [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/ Best regards, Hervé Changes v2 -> v3 v2: https://lore.kernel.org/lkml/20250909120041.154459-1-herve.codina@bootlin.com/ Reordered patches as suggested by Thomas Gleixner. Patch 1: (3 in v2) - Replace a wrong 'extern' by 'static inline' in of_irq.h (detected by test robots) Patch 2: (4 in v2) Patch 3: (5 in v2) Patch 4: (6 in v2) - No changes Patch 5: (1 in v2) - Add 'Reviewed-by: Wolfram Sang' - Add 'Tested-by: Wolfram Sang' Patch 6: (2 in v2) - Add '#address-cells = <0>;' in the interrupt-controller node present in the example. Patch 7: Patch 8: - No changes Changes v1 -> v2 v1: https://lore.kernel.org/lkml/20250725152618.32886-1-herve.codina@bootlin.com/ Rebase on top of v6.17-rc5 Patch 1 in v1 - Removed in v2 (no need for RZ/N1 compatible strings). Patch 1 (2 in v1) - Fix node names (issue reported by Rob's bot) - Fix compatible RZ/N1 compatible strings - Removed undocumented and unused 'bank-name' properties Patch 2 (3 in v1) - Remove 'interrupts' property - Update 'interrupt-map' description Patch 3 (4 in v1) - Rework of_irq_foreach_imap() to provide the for_each_of_imap_item iterator (similar to for_each_of_range) Patch 4 (new in v2) - Add a unittest for for_each_of_imap_item Patch 5 (new in v2) - Convert irqchip/ls-extirq to use for_each_of_imap_item Patch 6 (new in v2) - Convert irqchip/renesas-rza1 to use for_each_of_imap_item Patch 7 (5 in v1) - Use for_each_of_imap_item - Remove 'interrupts' property usage Patch 8 (6 in v1) - Remove 'interrupts' property Herve Codina (Schneider Electric) (8): of/irq: Introduce for_each_of_imap_item of: unittest: Add a test case for for_each_of_imap_item iterator irqchip/ls-extirq: Use for_each_of_imap_item iterator irqchip/renesas-rza1: Use for_each_of_imap_item iterator ARM: dts: r9a06g032: Add GPIO controllers dt-bindings: soc: renesas: Add the Renesas RZ/N1 GPIO Interrupt Multiplexer soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer ARM: dts: r9a06g032: Add support for GPIO interrupts .../soc/renesas/renesas,rzn1-gpioirqmux.yaml | 87 +++++++++ arch/arm/boot/dts/renesas/r9a06g032.dtsi | 170 ++++++++++++++++++ drivers/irqchip/irq-ls-extirq.c | 47 ++--- drivers/irqchip/irq-renesas-rza1.c | 43 ++--- drivers/of/irq.c | 70 ++++++++ .../of/unittest-data/tests-interrupts.dtsi | 9 + drivers/of/unittest.c | 116 ++++++++++++ drivers/soc/renesas/Kconfig | 4 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/rzn1_irqmux.c | 110 ++++++++++++ include/linux/of_irq.h | 41 ++++- 11 files changed, 640 insertions(+), 58 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzn1-gpioirqmux.yaml create mode 100644 drivers/soc/renesas/rzn1_irqmux.c -- 2.51.0
On Thu, Sep 18, 2025 at 12:39:58PM +0200, Herve Codina (Schneider Electric) wrote: > Hi, > > This series adds support for GPIO and GPIO IRQ mux available in the > RZ/N1 SoCs. > > The first patches in this series are related to a new helper introduced > to parse an interrupt-map property. > - patch 1: Introduce the helper (for_each_of_imap_item) > - patch 2: Add a unittest for the new helper > - patch 3 and 4: convert existing drivers to use this new helper > > Patch 4 will conflicts with commit 40c26230a1bf ("irqchip: Use int type > to store negative error codes") available in linux-next. > > Patch 5 adds support for GPIO (device-tree description) > > The last patches (6, 7 and 8) of the series are related to GPIO > interrupts and GPIO IRQ multiplexer. > > In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer. > > This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96 > available to wire them to the GIC input lines. > > One upstreaming attempt have been done previously by Phil Edworthy [1] > but the series has never been applied. > > Based on my understanding, I have fully reworked the driver proposed by > Phil and removed the IRQ domain. Indeed, the device doesn't handle > interrupts. It just routes signals. > > Also, as an interrupt-map property is used, the driver cannot be > involved as an interrupt controller itself. It is a nexus node. > > With that in mind, > - Patch 6 is related to the irq-mux binding. > > - Patch 7 introduces the irq-mux driver. > This driver uses the 'for_each_of_imap_item' helper introduced > previously. Indeed, the lines routing is defined by the > interrupt-map property and the driver needs to set registers to > apply this routing. > > - Patch 8 is the RZ/N1 device-tree description update to have the > support for the GPIO interrupts. > > [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/ > > Best regards, > Hervé This whole thing is super interesting to me. I have a gpio irq mux of my own with a driver that is massively more complex than what you have here (it's a full on irqchip driver). I'm definitely gonna have to see if I can ape what you have done here and simplify what I have.
Hi Conor, On Thu, 18 Sep 2025 16:37:39 +0100 Conor Dooley <conor@kernel.org> wrote: > On Thu, Sep 18, 2025 at 12:39:58PM +0200, Herve Codina (Schneider Electric) wrote: > > Hi, > > > > This series adds support for GPIO and GPIO IRQ mux available in the > > RZ/N1 SoCs. > > > > The first patches in this series are related to a new helper introduced > > to parse an interrupt-map property. > > - patch 1: Introduce the helper (for_each_of_imap_item) > > - patch 2: Add a unittest for the new helper > > - patch 3 and 4: convert existing drivers to use this new helper > > > > Patch 4 will conflicts with commit 40c26230a1bf ("irqchip: Use int type > > to store negative error codes") available in linux-next. > > > > Patch 5 adds support for GPIO (device-tree description) > > > > The last patches (6, 7 and 8) of the series are related to GPIO > > interrupts and GPIO IRQ multiplexer. > > > > In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer. > > > > This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96 > > available to wire them to the GIC input lines. > > > > One upstreaming attempt have been done previously by Phil Edworthy [1] > > but the series has never been applied. > > > > Based on my understanding, I have fully reworked the driver proposed by > > Phil and removed the IRQ domain. Indeed, the device doesn't handle > > interrupts. It just routes signals. > > > > Also, as an interrupt-map property is used, the driver cannot be > > involved as an interrupt controller itself. It is a nexus node. > > > > With that in mind, > > - Patch 6 is related to the irq-mux binding. > > > > - Patch 7 introduces the irq-mux driver. > > This driver uses the 'for_each_of_imap_item' helper introduced > > previously. Indeed, the lines routing is defined by the > > interrupt-map property and the driver needs to set registers to > > apply this routing. > > > > - Patch 8 is the RZ/N1 device-tree description update to have the > > support for the GPIO interrupts. > > > > [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@renesas.com/ > > > > Best regards, > > Hervé > > This whole thing is super interesting to me. I have a gpio irq mux of my > own with a driver that is massively more complex than what you have here > (it's a full on irqchip driver). I'm definitely gonna have to see if I > can ape what you have done here and simplify what I have. Glad to see that this is giving some ideas! Best regards, Hervé
> This series adds support for GPIO and GPIO IRQ mux available in the > RZ/N1 SoCs. I want to test this series today. From a glimpse, I might have some comments, so please wait a little before resending.
On Fri, Sep 19, 2025 at 07:41:47AM +0200, Wolfram Sang wrote: > > > This series adds support for GPIO and GPIO IRQ mux available in the > > RZ/N1 SoCs. > > I want to test this series today. From a glimpse, I might have some > comments, so please wait a little before resending. Despite the comments, the series works fine, so: Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
On Fri, Sep 19, 2025 at 11:43:18AM +0200, Wolfram Sang wrote: > On Fri, Sep 19, 2025 at 07:41:47AM +0200, Wolfram Sang wrote: > > > > > This series adds support for GPIO and GPIO IRQ mux available in the > > > RZ/N1 SoCs. > > > > I want to test this series today. From a glimpse, I might have some > > comments, so please wait a little before resending. > > Despite the comments, the series works fine, so: > > Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> To be more precise: I actually tested patches 1, 5, 6, 7, 8. Maybe I can test patch 4 later today on my RZ/A1-Genmai.
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