From: Shangjuan Wei <weishangjuan@eswincomputing.com>
Add ESWIN EIC7700 Ethernet controller, supporting clock
configuration, delay adjustment and speed adaptive functions.
Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/net/eswin,eic7700-eth.yaml | 127 ++++++++++++++++++
1 file changed, 127 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
new file mode 100644
index 000000000000..57d6d0efc126
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
@@ -0,0 +1,127 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/eswin,eic7700-eth.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 SOC Eth Controller
+
+maintainers:
+ - Shuang Liang <liangshuang@eswincomputing.com>
+ - Zhi Li <lizhi2@eswincomputing.com>
+ - Shangjuan Wei <weishangjuan@eswincomputing.com>
+
+description:
+ Platform glue layer implementation for STMMAC Ethernet driver.
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - eswin,eic7700-qos-eth
+ required:
+ - compatible
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: eswin,eic7700-qos-eth
+ - const: snps,dwmac-5.20
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: macirq
+
+ clocks:
+ items:
+ - description: AXI clock
+ - description: Configuration clock
+ - description: GMAC main clock
+ - description: Tx clock
+
+ clock-names:
+ items:
+ - const: axi
+ - const: cfg
+ - const: stmmaceth
+ - const: tx
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: stmmaceth
+
+ rx-internal-delay-ps:
+ enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
+
+ tx-internal-delay-ps:
+ enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
+
+ eswin,hsp-sp-csr:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - description: Phandle to HSP(High-Speed Peripheral) device
+ - description: Offset of phy control register for internal
+ or external clock selection
+ - description: Offset of AXI clock controller Low-Power request
+ register
+ - description: Offset of register controlling TX/RX clock delay
+ description: |
+ High-Speed Peripheral device needed to configure clock selection,
+ clock low-power mode and clock delay.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - phy-mode
+ - resets
+ - reset-names
+ - rx-internal-delay-ps
+ - tx-internal-delay-ps
+ - eswin,hsp-sp-csr
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@50400000 {
+ compatible = "eswin,eic7700-qos-eth", "snps,dwmac-5.20";
+ reg = <0x50400000 0x10000>;
+ clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
+ <&d0_clock 193>;
+ clock-names = "axi", "cfg", "stmmaceth", "tx";
+ interrupt-parent = <&plic>;
+ interrupts = <61>;
+ interrupt-names = "macirq";
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy0>;
+ resets = <&reset 95>;
+ reset-names = "stmmaceth";
+ rx-internal-delay-ps = <200>;
+ tx-internal-delay-ps = <200>;
+ eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,aal;
+ snps,fixed-burst;
+ snps,tso;
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <2>;
+ snps,wr_osr_lmt = <2>;
+ };
+ };
\ No newline at end of file
--
2.17.1On 9/18/25 01:59, weishangjuan@eswincomputing.com wrote:
> From: Shangjuan Wei <weishangjuan@eswincomputing.com>
>
> Add ESWIN EIC7700 Ethernet controller, supporting clock
> configuration, delay adjustment and speed adaptive functions.
>
> Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
> Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../bindings/net/eswin,eic7700-eth.yaml | 127 ++++++++++++++++++
> 1 file changed, 127 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
>
> diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> new file mode 100644
> index 000000000000..57d6d0efc126
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> @@ -0,0 +1,127 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/net/eswin,eic7700-eth.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Eswin EIC7700 SOC Eth Controller
> +
> +maintainers:
> + - Shuang Liang <liangshuang@eswincomputing.com>
> + - Zhi Li <lizhi2@eswincomputing.com>
> + - Shangjuan Wei <weishangjuan@eswincomputing.com>
> +
> +description:
> + Platform glue layer implementation for STMMAC Ethernet driver.
> +
> +select:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - eswin,eic7700-qos-eth
> + required:
> + - compatible
> +
> +allOf:
> + - $ref: snps,dwmac.yaml#
> +
> +properties:
> + compatible:
> + items:
> + - const: eswin,eic7700-qos-eth
> + - const: snps,dwmac-5.20
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + interrupt-names:
> + const: macirq
> +
> + clocks:
> + items:
> + - description: AXI clock
> + - description: Configuration clock
> + - description: GMAC main clock
> + - description: Tx clock
> +
> + clock-names:
> + items:
> + - const: axi
> + - const: cfg
> + - const: stmmaceth
> + - const: tx
> +
> + resets:
> + maxItems: 1
> +
> + reset-names:
> + items:
> + - const: stmmaceth
> +
> + rx-internal-delay-ps:
> + enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> +
> + tx-internal-delay-ps:
> + enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> +
> + eswin,hsp-sp-csr:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - description: Phandle to HSP(High-Speed Peripheral) device
> + - description: Offset of phy control register for internal
> + or external clock selection
> + - description: Offset of AXI clock controller Low-Power request
> + register
> + - description: Offset of register controlling TX/RX clock delay
> + description: |
> + High-Speed Peripheral device needed to configure clock selection,
> + clock low-power mode and clock delay.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - interrupts
> + - interrupt-names
> + - phy-mode
> + - resets
> + - reset-names
> + - rx-internal-delay-ps
> + - tx-internal-delay-ps
> + - eswin,hsp-sp-csr
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + ethernet@50400000 {
> + compatible = "eswin,eic7700-qos-eth", "snps,dwmac-5.20";
> + reg = <0x50400000 0x10000>;
> + clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
> + <&d0_clock 193>;
> + clock-names = "axi", "cfg", "stmmaceth", "tx";
> + interrupt-parent = <&plic>;
> + interrupts = <61>;
> + interrupt-names = "macirq";
> + phy-mode = "rgmii-id";
> + phy-handle = <&phy0>;
> + resets = <&reset 95>;
> + reset-names = "stmmaceth";
> + rx-internal-delay-ps = <200>;
> + tx-internal-delay-ps = <200>;
> + eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
> + snps,axi-config = <&stmmac_axi_setup>;
> + snps,aal;
> + snps,fixed-burst;
> + snps,tso;
> + stmmac_axi_setup: stmmac-axi-config {
> + snps,blen = <0 0 0 0 16 8 4>;
> + snps,rd_osr_lmt = <2>;
> + snps,wr_osr_lmt = <2>;
> + };
> + };
> \ No newline at end of file
> --
> 2.17.1
>
Hi ShangJuan,
I'm active user of HiFive p550. I'd like to test out this driver. Do you have
the device tree section of phy0 for Hifive p550 board? Or it's optional for
p550 board and I can just provide an empty &phy0 node? Regarding hsp_sp_csr
node, I should be able to use
https://github.com/sifiveinc/riscv-linux/blob/b4a753400e624a0eba3ec475fba2866dd7efb767/arch/riscv/boot/dts/eswin/eic7700.dtsi#L167
correct?
Bo
Hi Bo Gan,
Please see the original email. You can refer to the following
supplement about phy0 in the gmac0 DTS node.
Best regards,
Li Zhi
> -----原始邮件-----
> 发件人: "Bo Gan" <ganboing@gmail.com>
> 发送时间:2025-10-14 16:53:38 (星期二)
> 收件人: weishangjuan@eswincomputing.com, devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, netdev@vger.kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, vladimir.oltean@nxp.com, rmk+kernel@armlinux.org.uk, yong.liang.choong@linux.intel.com, anthony.l.nguyen@intel.com, prabhakar.mahadev-lad.rj@bp.renesas.com, jan.petrous@oss.nxp.com, jszhang@kernel.org, inochiama@gmail.com, 0x1207@gmail.com, boon.khai.ng@altera.com, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org
> 抄送: ningyu@eswincomputing.com, linmin@eswincomputing.com, lizhi2@eswincomputing.com, pinkesh.vaghela@einfochips.com, "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
> 主题: Re: [PATCH v7 1/2] dt-bindings: ethernet: eswin: Document for EIC7700 SoC
>
> On 9/18/25 01:59, weishangjuan@eswincomputing.com wrote:
> > From: Shangjuan Wei <weishangjuan@eswincomputing.com>
> >
> > Add ESWIN EIC7700 Ethernet controller, supporting clock
> > configuration, delay adjustment and speed adaptive functions.
> >
> > Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
> > Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> > ---
> > .../bindings/net/eswin,eic7700-eth.yaml | 127 ++++++++++++++++++
> > 1 file changed, 127 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> > new file mode 100644
> > index 000000000000..57d6d0efc126
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
> > @@ -0,0 +1,127 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/net/eswin,eic7700-eth.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Eswin EIC7700 SOC Eth Controller
> > +
> > +maintainers:
> > + - Shuang Liang <liangshuang@eswincomputing.com>
> > + - Zhi Li <lizhi2@eswincomputing.com>
> > + - Shangjuan Wei <weishangjuan@eswincomputing.com>
> > +
> > +description:
> > + Platform glue layer implementation for STMMAC Ethernet driver.
> > +
> > +select:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - eswin,eic7700-qos-eth
> > + required:
> > + - compatible
> > +
> > +allOf:
> > + - $ref: snps,dwmac.yaml#
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: eswin,eic7700-qos-eth
> > + - const: snps,dwmac-5.20
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > + interrupt-names:
> > + const: macirq
> > +
> > + clocks:
> > + items:
> > + - description: AXI clock
> > + - description: Configuration clock
> > + - description: GMAC main clock
> > + - description: Tx clock
> > +
> > + clock-names:
> > + items:
> > + - const: axi
> > + - const: cfg
> > + - const: stmmaceth
> > + - const: tx
> > +
> > + resets:
> > + maxItems: 1
> > +
> > + reset-names:
> > + items:
> > + - const: stmmaceth
> > +
> > + rx-internal-delay-ps:
> > + enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> > +
> > + tx-internal-delay-ps:
> > + enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
> > +
> > + eswin,hsp-sp-csr:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + items:
> > + - description: Phandle to HSP(High-Speed Peripheral) device
> > + - description: Offset of phy control register for internal
> > + or external clock selection
> > + - description: Offset of AXI clock controller Low-Power request
> > + register
> > + - description: Offset of register controlling TX/RX clock delay
> > + description: |
> > + High-Speed Peripheral device needed to configure clock selection,
> > + clock low-power mode and clock delay.
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - clocks
> > + - clock-names
> > + - interrupts
> > + - interrupt-names
> > + - phy-mode
> > + - resets
> > + - reset-names
> > + - rx-internal-delay-ps
> > + - tx-internal-delay-ps
> > + - eswin,hsp-sp-csr
> > +
> > +unevaluatedProperties: false
> > +
> > +examples:
> > + - |
> > + ethernet@50400000 {
> > + compatible = "eswin,eic7700-qos-eth", "snps,dwmac-5.20";
> > + reg = <0x50400000 0x10000>;
> > + clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
> > + <&d0_clock 193>;
> > + clock-names = "axi", "cfg", "stmmaceth", "tx";
> > + interrupt-parent = <&plic>;
> > + interrupts = <61>;
> > + interrupt-names = "macirq";
> > + phy-mode = "rgmii-id";
> > + phy-handle = <&phy0>;
> > + resets = <&reset 95>;
> > + reset-names = "stmmaceth";
> > + rx-internal-delay-ps = <200>;
> > + tx-internal-delay-ps = <200>;
> > + eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
> > + snps,axi-config = <&stmmac_axi_setup>;
> > + snps,aal;
> > + snps,fixed-burst;
> > + snps,tso;
> > + stmmac_axi_setup: stmmac-axi-config {
> > + snps,blen = <0 0 0 0 16 8 4>;
> > + snps,rd_osr_lmt = <2>;
> > + snps,wr_osr_lmt = <2>;
> > + };
mdio {
compatible = "snps,dwmac-mdio";
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
device_type = "ethernet-phy";
reg = <0>;
compatible = "ethernet-phy-id001c.c916", "realtek,rtl8211f";
};
};
> > + };
> > \ No newline at end of file
> > --
> > 2.17.1
> >
>
> Hi ShangJuan,
>
> I'm active user of HiFive p550. I'd like to test out this driver. Do you have
> the device tree section of phy0 for Hifive p550 board? Or it's optional for
> p550 board and I can just provide an empty &phy0 node? Regarding hsp_sp_csr
> node, I should be able to use
> https://github.com/sifiveinc/riscv-linux/blob/b4a753400e624a0eba3ec475fba2866dd7efb767/arch/riscv/boot/dts/eswin/eic7700.dtsi#L167
> correct?
>
> Bo
On Thu, 18 Sep 2025 16:59:03 +0800, weishangjuan@eswincomputing.com wrote: > From: Shangjuan Wei <weishangjuan@eswincomputing.com> > > Add ESWIN EIC7700 Ethernet controller, supporting clock > configuration, delay adjustment and speed adaptive functions. > > Signed-off-by: Zhi Li <lizhi2@eswincomputing.com> > Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > .../bindings/net/eswin,eic7700-eth.yaml | 127 ++++++++++++++++++ > 1 file changed, 127 insertions(+) > create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml:127:7: [error] no new line character at the end of file (new-line-at-end-of-file) dtschema/dtc warnings/errors: doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250918085903.3228-1-weishangjuan@eswincomputing.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
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