On Thu, Sep 18, 2025 at 11:25:53AM +0800, Richard Zhu wrote:
> Add external reference clock input "extref" for a reference clock that
> comes from external crystal oscillator.
Sigh. A different subject on every version throws off my scripts...
Perhaps slow down your pace of sending new versions.
See my comments on v5.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
> .../devicetree/bindings/pci/snps,dw-pcie-common.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> index 34594972d8db..0134a759185e 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml
> @@ -105,6 +105,12 @@ properties:
> define it with this name (for instance pipe, core and aux can
> be connected to a single source of the periodic signal).
> const: ref
> + - description:
> + Some dwc wrappers (like i.MX95 PCIes) have two reference clock
> + inputs, one from an internal PLL, the other from an off-chip crystal
> + oscillator. If present, 'extref' refers to a reference clock from
> + an external oscillator.
> + const: extref
> - description:
> Clock for the PHY registers interface. Originally this is
> a PHY-viewport-based interface, but some platform may have
> --
> 2.37.1
>