Define a node for the fourth SoC SPI controller (number 3) on
the SpacemiT K1 SoC.
Enable it on the Banana Pi BPI-F3 board, which exposes this feature
via its GPIO block:
GPIO PIN 19: MOSI
GPIO PIN 21: MISO
GPIO PIN 23: SCLK
GPIO PIN 24: SS (inverted)
Define pincontrol configurations for the pins as used on that board.
(This was tested using a GigaDevice GD25Q64E SPI NOR chip.)
Signed-off-by: Alex Elder <elder@riscstar.com>
---
.../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++
arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++
arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++++++++++
3 files changed, 45 insertions(+)
diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
index 6013be2585428..380d475d2f3f3 100644
--- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
+++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts
@@ -44,6 +44,12 @@ &pdma {
status = "okay";
};
+&spi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp3_0_cfg>;
+ status = "okay";
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_2_cfg>;
diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
index 3810557374228..16c953eca2aaa 100644
--- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi
@@ -28,4 +28,24 @@ pwm14-1-pins {
drive-strength = <32>;
};
};
+
+ ssp3_0_cfg: ssp3-0-cfg {
+ ssp3-0-no-pull-pins {
+ pinmux = <K1_PADCONF(75, 2)>, /* SCLK */
+ <K1_PADCONF(77, 2)>, /* MOSI */
+ <K1_PADCONF(78, 2)>; /* MISO */
+
+ bias-disable;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+
+ ssp3-0-frm-pins {
+ pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */
+
+ bias-pull-up = <0>;
+ drive-strength = <19>;
+ power-source = <3300>;
+ };
+ };
};
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 66b33a9110ccd..a826cc1ac83d5 100644
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -834,6 +834,25 @@ storage-bus {
#size-cells = <2>;
dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>;
+ spi3: spi@d401c000 {
+ compatible = "spacemit,k1-spi";
+ reg = <0x0 0xd401c000 0x0 0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&syscon_apbc CLK_SSP3>,
+ <&syscon_apbc CLK_SSP3_BUS>;
+ clock-names = "core",
+ "bus";
+ resets = <&syscon_apbc RESET_SSP3>;
+ interrupts-extended = <&plic 55>;
+ spacemit,k1-ssp-id = <3>;
+ dmas = <&pdma 20>,
+ <&pdma 19>;
+ dma-names = "rx",
+ "tx";
+ status = "disabled";
+ };
+
emmc: mmc@d4281000 {
compatible = "spacemit,k1-sdhci";
reg = <0x0 0xd4281000 0x0 0x200>;
--
2.48.1
Hi Alex, On 17:07 Wed 17 Sep , Alex Elder wrote: > Define a node for the fourth SoC SPI controller (number 3) on > the SpacemiT K1 SoC. > > Enable it on the Banana Pi BPI-F3 board, which exposes this feature > via its GPIO block: > GPIO PIN 19: MOSI > GPIO PIN 21: MISO > GPIO PIN 23: SCLK > GPIO PIN 24: SS (inverted) > > Define pincontrol configurations for the pins as used on that board. > > (This was tested using a GigaDevice GD25Q64E SPI NOR chip.) > > Signed-off-by: Alex Elder <elder@riscstar.com> > --- > .../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++ > arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++ > arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++++++++++ > 3 files changed, 45 insertions(+) > > diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts > index 6013be2585428..380d475d2f3f3 100644 > --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts > +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts > @@ -44,6 +44,12 @@ &pdma { > status = "okay"; > }; > > +&spi3 { .. > + pinctrl-names = "default"; > + pinctrl-0 = <&ssp3_0_cfg>; Can you swap the order of these two pinctrl properties? Yes, we currently have some inconsistency in tree, I plan to fix during next cycle > + status = "okay"; > +}; > + > &uart0 { > pinctrl-names = "default"; > pinctrl-0 = <&uart0_2_cfg>; > diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > index 3810557374228..16c953eca2aaa 100644 > --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi > @@ -28,4 +28,24 @@ pwm14-1-pins { > drive-strength = <32>; > }; > }; > + > + ssp3_0_cfg: ssp3-0-cfg { > + ssp3-0-no-pull-pins { > + pinmux = <K1_PADCONF(75, 2)>, /* SCLK */ > + <K1_PADCONF(77, 2)>, /* MOSI */ > + <K1_PADCONF(78, 2)>; /* MISO */ > + > + bias-disable; > + drive-strength = <19>; > + power-source = <3300>; > + }; > + > + ssp3-0-frm-pins { > + pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */ > + > + bias-pull-up = <0>; > + drive-strength = <19>; > + power-source = <3300>; > + }; > + }; > }; > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > index 66b33a9110ccd..a826cc1ac83d5 100644 > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > @@ -834,6 +834,25 @@ storage-bus { > #size-cells = <2>; > dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; > > + spi3: spi@d401c000 { > + compatible = "spacemit,k1-spi"; > + reg = <0x0 0xd401c000 0x0 0x30>; > + #address-cells = <1>; > + #size-cells = <0>; > + clocks = <&syscon_apbc CLK_SSP3>, > + <&syscon_apbc CLK_SSP3_BUS>; .. > + clock-names = "core", > + "bus"; can you simply put them together in one line? it's kind of tedious to split.. > + resets = <&syscon_apbc RESET_SSP3>; > + interrupts-extended = <&plic 55>; why use interrupts-extended? > + spacemit,k1-ssp-id = <3>; > + dmas = <&pdma 20>, > + <&pdma 19>; .. em, so the SPI will use pdma, then probably you should also adjust Kconfig to select PDMA driver? > + dma-names = "rx", > + "tx"; > + status = "disabled"; > + }; > + > emmc: mmc@d4281000 { > compatible = "spacemit,k1-sdhci"; > reg = <0x0 0xd4281000 0x0 0x200>; > -- > 2.48.1 > > -- Yixun Lan (dlan)
On Thu, Sep 18, 2025 at 09:32:09PM +0800, Yixun Lan wrote: > Hi Alex, > > On 17:07 Wed 17 Sep , Alex Elder wrote: > > Define a node for the fourth SoC SPI controller (number 3) on > > the SpacemiT K1 SoC. > > > > Enable it on the Banana Pi BPI-F3 board, which exposes this feature > > via its GPIO block: > > GPIO PIN 19: MOSI > > GPIO PIN 21: MISO > > GPIO PIN 23: SCLK > > GPIO PIN 24: SS (inverted) > > > > Define pincontrol configurations for the pins as used on that board. > > > > (This was tested using a GigaDevice GD25Q64E SPI NOR chip.) > > > > Signed-off-by: Alex Elder <elder@riscstar.com> > > --- > > .../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++ > > arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++ > > arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++++++++++ > > 3 files changed, 45 insertions(+) ... > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > > index 66b33a9110ccd..a826cc1ac83d5 100644 > > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > > @@ -834,6 +834,25 @@ storage-bus { > > #size-cells = <2>; > > dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; > > > > + spi3: spi@d401c000 { > > + compatible = "spacemit,k1-spi"; > > + reg = <0x0 0xd401c000 0x0 0x30>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + clocks = <&syscon_apbc CLK_SSP3>, > > + <&syscon_apbc CLK_SSP3_BUS>; > .. > > + clock-names = "core", > > + "bus"; > can you simply put them together in one line? it's kind of tedious to split.. > > + resets = <&syscon_apbc RESET_SSP3>; > > + interrupts-extended = <&plic 55>; > why use interrupts-extended? > > + spacemit,k1-ssp-id = <3>; > > + dmas = <&pdma 20>, > > + <&pdma 19>; > .. em, so the SPI will use pdma, then probably you should also adjust Kconfig to > select PDMA driver? The driver seems to depend on the generic DMA engine API only, IOW, theoretically it should work with other DMA controller as well. And it's even capable to operate without DMA (see k1_spi_dma_setup()). Dependency to PDMA really doesn't seem something should be enforced in Kconfig: it doesn't exist in code level, and the driver is actually more flexible. Best regards, Yao Zi > > + dma-names = "rx", > > + "tx"; > > + status = "disabled"; > > + }; > > + > > emmc: mmc@d4281000 { > > compatible = "spacemit,k1-sdhci"; > > reg = <0x0 0xd4281000 0x0 0x200>; > > -- > > 2.48.1 > > > > > > -- > Yixun Lan (dlan) >
On 9/18/25 9:33 AM, Yao Zi wrote: >> .. em, so the SPI will use pdma, then probably you should also adjust Kconfig to >> select PDMA driver? > The driver seems to depend on the generic DMA engine API only, IOW, > theoretically it should work with other DMA controller as well. And it's > even capable to operate without DMA (see k1_spi_dma_setup()). > > Dependency to PDMA really doesn't seem something should be enforced in > Kconfig: it doesn't exist in code level, and the driver is actually more > flexible. You're right on both points. The code doesn't *require* PDMA to operate correctly (to my knowledge). Yixun, what do you think? -Alex
On 9/18/25 11:22 AM, Alex Elder wrote: > On 9/18/25 9:33 AM, Yao Zi wrote: >>> .. em, so the SPI will use pdma, then probably you should also adjust >>> Kconfig to >>> select PDMA driver? >> The driver seems to depend on the generic DMA engine API only, IOW, >> theoretically it should work with other DMA controller as well. And it's >> even capable to operate without DMA (see k1_spi_dma_setup()). >> >> Dependency to PDMA really doesn't seem something should be enforced in >> Kconfig: it doesn't exist in code level, and the driver is actually more >> flexible. > > You're right on both points. The code doesn't *require* PDMA to > operate correctly (to my knowledge). > > Yixun, what do you think? > > -Alex I did some experiments. Currently, if I build a kernel with SPI_SPACEMIT_K1 enabled (module or built-in) but MMP_PDMA not set, the K1 SPI driver probe doesn't complete. The reason is that dma_request_chan() returns -EPROBE_DEFER, not "knowing" that the needed driver will never show up. For now I have added a call to IS_ENABLED(CONFIG_MMP_PDMA) in devm_k1_spi_dma_setup(), and if it's not enabled it will return 0 (to indicate "all is well, but we won't use DMA"). That doesn't allow for a different DMA option, but it does allow the driver to work without an explicit dependency on the MMP_PDMA (via Kconfig). -Alex
On 9/18/25 8:32 AM, Yixun Lan wrote: > Hi Alex, > > On 17:07 Wed 17 Sep , Alex Elder wrote: >> Define a node for the fourth SoC SPI controller (number 3) on >> the SpacemiT K1 SoC. >> >> Enable it on the Banana Pi BPI-F3 board, which exposes this feature >> via its GPIO block: >> GPIO PIN 19: MOSI >> GPIO PIN 21: MISO >> GPIO PIN 23: SCLK >> GPIO PIN 24: SS (inverted) >> >> Define pincontrol configurations for the pins as used on that board. >> >> (This was tested using a GigaDevice GD25Q64E SPI NOR chip.) >> >> Signed-off-by: Alex Elder <elder@riscstar.com> >> --- >> .../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++ >> arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++ >> arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++++++++++ >> 3 files changed, 45 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts >> index 6013be2585428..380d475d2f3f3 100644 >> --- a/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts >> +++ b/arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts >> @@ -44,6 +44,12 @@ &pdma { >> status = "okay"; >> }; >> >> +&spi3 { > .. >> + pinctrl-names = "default"; >> + pinctrl-0 = <&ssp3_0_cfg>; > Can you swap the order of these two pinctrl properties? > Yes, we currently have some inconsistency in tree, I plan to fix during next cycle Sure, I'll do that. >> + status = "okay"; >> +}; >> + >> &uart0 { >> pinctrl-names = "default"; >> pinctrl-0 = <&uart0_2_cfg>; >> diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi >> index 3810557374228..16c953eca2aaa 100644 >> --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi >> +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi >> @@ -28,4 +28,24 @@ pwm14-1-pins { >> drive-strength = <32>; >> }; >> }; >> + >> + ssp3_0_cfg: ssp3-0-cfg { >> + ssp3-0-no-pull-pins { >> + pinmux = <K1_PADCONF(75, 2)>, /* SCLK */ >> + <K1_PADCONF(77, 2)>, /* MOSI */ >> + <K1_PADCONF(78, 2)>; /* MISO */ >> + >> + bias-disable; >> + drive-strength = <19>; >> + power-source = <3300>; >> + }; >> + >> + ssp3-0-frm-pins { >> + pinmux = <K1_PADCONF(76, 2)>; /* FRM (frame) */ >> + >> + bias-pull-up = <0>; >> + drive-strength = <19>; >> + power-source = <3300>; >> + }; >> + }; >> }; >> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi >> index 66b33a9110ccd..a826cc1ac83d5 100644 >> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi >> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi >> @@ -834,6 +834,25 @@ storage-bus { >> #size-cells = <2>; >> dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; >> >> + spi3: spi@d401c000 { >> + compatible = "spacemit,k1-spi"; >> + reg = <0x0 0xd401c000 0x0 0x30>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + clocks = <&syscon_apbc CLK_SSP3>, >> + <&syscon_apbc CLK_SSP3_BUS>; > .. >> + clock-names = "core", >> + "bus"; > can you simply put them together in one line? it's kind of tedious to split.. Sure I can do that. I've seen it both ways. >> + resets = <&syscon_apbc RESET_SSP3>; >> + interrupts-extended = <&plic 55>; > why use interrupts-extended? Because it specifies both the controller and interrupt number explicitly. Why *not* use interrupts-extended? >> + spacemit,k1-ssp-id = <3>; >> + dmas = <&pdma 20>, >> + <&pdma 19>; > .. em, so the SPI will use pdma, then probably you should also adjust Kconfig to > select PDMA driver? You're right. Thanks for catching that. -Alex > >> + dma-names = "rx", >> + "tx"; >> + status = "disabled"; >> + }; >> + >> emmc: mmc@d4281000 { >> compatible = "spacemit,k1-sdhci"; >> reg = <0x0 0xd4281000 0x0 0x200>; >> -- >> 2.48.1 >> >> >
Hi Alex, On 08:51 Thu 18 Sep , Alex Elder wrote: > On 9/18/25 8:32 AM, Yixun Lan wrote: > >> + spi3: spi@d401c000 { > >> + compatible = "spacemit,k1-spi"; > >> + reg = <0x0 0xd401c000 0x0 0x30>; > >> + #address-cells = <1>; > >> + #size-cells = <0>; > >> + clocks = <&syscon_apbc CLK_SSP3>, > >> + <&syscon_apbc CLK_SSP3_BUS>; > > .. > >> + clock-names = "core", > >> + "bus"; > > can you simply put them together in one line? it's kind of tedious to split.. > > Sure I can do that. I've seen it both ways. > right, it's merely a coding style I want to enforce, to make it slightly consistent > >> + resets = <&syscon_apbc RESET_SSP3>; > >> + interrupts-extended = <&plic 55>; > > why use interrupts-extended? > > Because it specifies both the controller and interrupt number > explicitly. Why *not* use interrupts-extended? > It's just unnecessary, the SPI node will fall back to find parent node's interrupt which already specific as &plic, brings no benefits > >> + spacemit,k1-ssp-id = <3>; > >> + dmas = <&pdma 20>, > >> + <&pdma 19>; -- Yixun Lan (dlan)
On 9/18/25 9:06 AM, Yixun Lan wrote: > Hi Alex, > > On 08:51 Thu 18 Sep , Alex Elder wrote: >> On 9/18/25 8:32 AM, Yixun Lan wrote: >>>> + spi3: spi@d401c000 { >>>> + compatible = "spacemit,k1-spi"; >>>> + reg = <0x0 0xd401c000 0x0 0x30>; >>>> + #address-cells = <1>; >>>> + #size-cells = <0>; >>>> + clocks = <&syscon_apbc CLK_SSP3>, >>>> + <&syscon_apbc CLK_SSP3_BUS>; >>> .. >>>> + clock-names = "core", >>>> + "bus"; >>> can you simply put them together in one line? it's kind of tedious to split.. >> >> Sure I can do that. I've seen it both ways. >> > right, it's merely a coding style I want to enforce, to make it slightly consistent > >>>> + resets = <&syscon_apbc RESET_SSP3>; >>>> + interrupts-extended = <&plic 55>; >>> why use interrupts-extended? >> >> Because it specifies both the controller and interrupt number >> explicitly. Why *not* use interrupts-extended? >> > It's just unnecessary, the SPI node will fall back to find parent node's interrupt > which already specific as &plic, brings no benefits The benefit it brings is that I don't have to search backward to see what the interrupt controller is. I realize it's redundant but I do prefer interrupts-extended over just interrupts. -Alex > >>>> + spacemit,k1-ssp-id = <3>; >>>> + dmas = <&pdma 20>, >>>> + <&pdma 19>; >
Hi Alex, On 09:20 Thu 18 Sep , Alex Elder wrote: > On 9/18/25 9:06 AM, Yixun Lan wrote: > > Hi Alex, > > > > On 08:51 Thu 18 Sep , Alex Elder wrote: > >> On 9/18/25 8:32 AM, Yixun Lan wrote: > >>>> + spi3: spi@d401c000 { > >>>> + compatible = "spacemit,k1-spi"; > >>>> + reg = <0x0 0xd401c000 0x0 0x30>; > >>>> + #address-cells = <1>; > >>>> + #size-cells = <0>; > >>>> + clocks = <&syscon_apbc CLK_SSP3>, > >>>> + <&syscon_apbc CLK_SSP3_BUS>; > >>> .. > >>>> + clock-names = "core", > >>>> + "bus"; > >>> can you simply put them together in one line? it's kind of tedious to split.. > >> > >> Sure I can do that. I've seen it both ways. > >> > > right, it's merely a coding style I want to enforce, to make it slightly consistent > > > >>>> + resets = <&syscon_apbc RESET_SSP3>; > >>>> + interrupts-extended = <&plic 55>; > >>> why use interrupts-extended? > >> > >> Because it specifies both the controller and interrupt number > >> explicitly. Why *not* use interrupts-extended? > >> > > It's just unnecessary, the SPI node will fall back to find parent node's interrupt > > which already specific as &plic, brings no benefits > > The benefit it brings is that I don't have to search backward to > see what the interrupt controller is. I realize it's redundant > but I do prefer interrupts-extended over just interrupts. > although both should work fine, I do prefer simple "interrupts" version for dts wide consistence, at least for SpacemiT while reading Documentation/devicetree/bindings/interrupt-controller/interrupts.txt interrupts-extended is useful when there are multi interrupt parents, or need to specific different one.. Yes, we have different opinion here, let's wait and see what DT maintainer think -- Yixun Lan (dlan)
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