From: Hailong Fan <hailong.fan@mediatek.com>
Add device tree binding documentation for the MediaTek
MT8196 DSP. The DSP is used by the Sound Open Firmware
driver node and includes registers, clocks, memory regions,
and a mailbox for DSP communication.
Signed-off-by: Hailong Fan <hailong.fan@mediatek.com>
---
.../bindings/dsp/mediatek,mt8196-dsp.yaml | 98 +++++++++++++++++++
1 file changed, 98 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
new file mode 100644
index 000000000000..af0f9d71200f
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mediatek,mt8196-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MediaTek mt8196 DSP core
+
+maintainers:
+ - Hailong Fan <hailong.fan@mediatek.com>
+
+description: |
+ The MediaTek mt8196 SoC contains a DSP core used for advanced pre-
+ and post-audio processing. This DSP is typically used by the Sound
+ Open Firmware (SOF) driver and requires registers, clocks, memory
+ regions, and a mailbox for communication.
+
+properties:
+ compatible:
+ const: mediatek,mt8196-dsp
+
+ reg:
+ items:
+ - description: DSP configuration registers
+ - description: DSP SRAM
+ - description: DSP secure registers
+ - description: DSP bus registers
+
+ reg-names:
+ items:
+ - const: cfg
+ - const: sram
+ - const: sec
+ - const: bus
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: audio dsp 26M clock source
+ - description: audio dsp PLL clock source
+
+ clock-names:
+ items:
+ - const: audiodsp
+ - const: sys_clk
+ - const: adsppll
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ items:
+ - description: mailbox for receiving audio DSP requests.
+ - description: mailbox for transmitting requests to audio DSP.
+
+ mbox-names:
+ items:
+ - const: rx
+ - const: tx
+
+ memory-region:
+ items:
+ - description: dma buffer between host and DSP.
+ - description: DSP system memory.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - power-domains
+ - mboxes
+ - mbox-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/mt8196-clk.h>
+ #include <dt-bindings/power/mt8196-power.h>
+ adsp@1a000000 {
+ compatible = "mediatek,mt8196-dsp";
+ reg = <0x1a000000 0x5000>,
+ <0x1a210000 0x80000>,
+ <0x1a345000 0x300>,
+ <0x1a00f000 0x1000>;
+ reg-names = "cfg", "sram", "sec", "bus";
+ clocks = <&cksys_clk CLK_CK_ADSP_SEL>,
+ <&cksys_clk CLK_CK_TCK_26M_MX9>,
+ <&cksys_clk CLK_CK_ADSPPLL>;
+ clock-names = "audiodsp",
+ "sys_clk",
+ "adsppll";
+ power-domains = <&scpsys MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ mbox-names = "rx", "tx";
+ };
--
2.45.2Il 17/09/25 09:53, hailong.fan ha scritto:
> From: Hailong Fan <hailong.fan@mediatek.com>
>
> Add device tree binding documentation for the MediaTek
> MT8196 DSP. The DSP is used by the Sound Open Firmware
> driver node and includes registers, clocks, memory regions,
> and a mailbox for DSP communication.
>
> Signed-off-by: Hailong Fan <hailong.fan@mediatek.com>
> ---
> .../bindings/dsp/mediatek,mt8196-dsp.yaml | 98 +++++++++++++++++++
> 1 file changed, 98 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
>
> diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
> new file mode 100644
> index 000000000000..af0f9d71200f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
> @@ -0,0 +1,98 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dsp/mediatek,mt8196-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek mt8196 DSP core
mt->MT (MT8196)
> +
> +maintainers:
> + - Hailong Fan <hailong.fan@mediatek.com>
> +
> +description: |
Drop the colon |, you don't need it.
> + The MediaTek mt8196 SoC contains a DSP core used for advanced pre-
mt->MT (MT8196)
Also document *which* DSP core this SoC contains. Specifically, say that this SoC
contains a dual-core Cadence HiFi5 Audio Engine DSP - because this is what it is.
> + and post-audio processing. This DSP is typically used by the Sound
> + Open Firmware (SOF) driver and requires registers, clocks, memory
> + regions, and a mailbox for communication.
..snip..
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/mt8196-clk.h>
> + #include <dt-bindings/power/mt8196-power.h>
Before including binding headers with the same names as downstream, refer to the
series that are currently on the mailing lists, because that's what will ultimately
get upstream.
dt-bindings/clock/mediatek,mt8196-clock.h
dt-bindings/power/mediatek,mt8196-power.h
> + adsp@1a000000 {
> + compatible = "mediatek,mt8196-dsp";
> + reg = <0x1a000000 0x5000>,
> + <0x1a210000 0x80000>,
> + <0x1a345000 0x300>,
> + <0x1a00f000 0x1000>;
> + reg-names = "cfg", "sram", "sec", "bus";
> + clocks = <&cksys_clk CLK_CK_ADSP_SEL>,
> + <&cksys_clk CLK_CK_TCK_26M_MX9>,
> + <&cksys_clk CLK_CK_ADSPPLL>;
and use the upstream names for those clocks.
<&topckgen CLK_TOP_ADSP>,
<&clk26m>,
<&apmixedsys CLK_APMIXED_ADSPPLL>,
> + clock-names = "audiodsp",
> + "sys_clk",
> + "adsppll";
clock-names fit in one line; plus, please "sys-clk" instead.
> + power-domains = <&scpsys MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;
power-domains = <&spm MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;
> + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
> + mbox-names = "rx", "tx";
> + };
Regards,
Angelo
On Wed, 17 Sep 2025 15:53:05 +0800, hailong.fan wrote:
> From: Hailong Fan <hailong.fan@mediatek.com>
>
> Add device tree binding documentation for the MediaTek
> MT8196 DSP. The DSP is used by the Sound Open Firmware
> driver node and includes registers, clocks, memory regions,
> and a mailbox for DSP communication.
>
> Signed-off-by: Hailong Fan <hailong.fan@mediatek.com>
> ---
> .../bindings/dsp/mediatek,mt8196-dsp.yaml | 98 +++++++++++++++++++
> 1 file changed, 98 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.example.dts:18:18: fatal error: dt-bindings/clock/mt8196-clk.h: No such file or directory
18 | #include <dt-bindings/clock/mt8196-clk.h>
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
compilation terminated.
make[2]: *** [scripts/Makefile.dtbs:132: Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.example.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1525: dt_binding_check] Error 2
make: *** [Makefile:248: __sub-make] Error 2
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250917075336.5985-2-hailong.fan@mediatek.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
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