i.MX95 PCIes have two reference clock inputs: one from internal PLL,
the other from off chip crystal oscillator. Use extref clock name to be
onhalf of the reference clock comes from external crystal oscillator.

Add one more external reference clock for i.MX95 PCIes.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index ca5f2970f217..b4c40d0573dc 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -212,14 +212,17 @@ allOf:
     then:
       properties:
         clocks:
+          minItems: 4
           maxItems: 5
         clock-names:
+          minItems: 4
           items:
             - const: pcie
             - const: pcie_bus
             - const: pcie_phy
             - const: pcie_aux
             - const: ref
+            - const: extref  # Optional
 
 unevaluatedProperties: false
 
-- 
2.37.1

Update subject line similar to patch 1/3?

Also, I notice most binding commits include "PCI:", e.g.,

  dt-bindings: PCI: brcm,stb-pcie: ...
  dt-bindings: PCI: qcom: ...
  dt-bindings: PCI: altera ...

On Wed, Sep 17, 2025 at 12:52:37PM +0800, Richard Zhu wrote:
> i.MX95 PCIes have two reference clock inputs: one from internal PLL,
> the other from off chip crystal oscillator. Use extref clock name to be
> onhalf of the reference clock comes from external crystal oscillator.

Not sure what "onhalf" means.  Maybe it means something like this?

  The "extref" clock refers to a reference clock from an external
  crystal oscillator.

Same issue in patch 3/3.

> Add one more external reference clock for i.MX95 PCIes.